mirror of
https://github.com/RPCS3/llvm-mirror.git
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f59acc15ad
Summary: This is a resurrection of work first proposed and discussed in Aug 2015: http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html and initially landed (but then backed out) in Nov 2015: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change is the first in a series that allows source and dest to each have their own alignments by using the alignment attribute on their arguments. In this change we: 1) Remove the alignment argument. 2) Add alignment attributes to the source & dest arguments. We, temporarily, require that the alignments for source & dest be equal. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) Downstream users may have to update their lit tests that check for @llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script may help with updating the majority of your tests, but it does not catch all possible patterns so some manual checking and updating will be required. s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g The remaining changes in the series will: Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. Step 3) Update Clang to use the new IRBuilder API. Step 4) Update Polly to use the new IRBuilder API. Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use getDestAlignment() and getSourceAlignment() instead. Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reviewers: pete, hfinkel, lhames, reames, bollu Reviewed By: reames Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits Differential Revision: https://reviews.llvm.org/D41675 llvm-svn: 322965
185 lines
7.6 KiB
LLVM
185 lines
7.6 KiB
LLVM
; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 -O0 | FileCheck %s --check-prefix PTX
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; RUN: opt < %s -S -nvptx-lower-aggr-copies | FileCheck %s --check-prefix IR
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; Verify that the NVPTXLowerAggrCopies pass works as expected - calls to
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; llvm.mem* intrinsics get lowered to loops.
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "nvptx64-unknown-unknown"
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
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declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #1
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define i8* @memcpy_caller(i8* %dst, i8* %src, i64 %n) #0 {
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %n, i1 false)
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ret i8* %dst
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; IR-LABEL: @memcpy_caller
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; IR: entry:
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; IR: [[Cond:%[0-9]+]] = icmp ne i64 %n, 0
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; IR: br i1 [[Cond]], label %loop-memcpy-expansion, label %post-loop-memcpy-expansion
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; IR: loop-memcpy-expansion:
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; IR: %loop-index = phi i64 [ 0, %entry ], [ [[IndexInc:%[0-9]+]], %loop-memcpy-expansion ]
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; IR: [[SrcGep:%[0-9]+]] = getelementptr inbounds i8, i8* %src, i64 %loop-index
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; IR: [[Load:%[0-9]+]] = load i8, i8* [[SrcGep]]
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; IR: [[DstGep:%[0-9]+]] = getelementptr inbounds i8, i8* %dst, i64 %loop-index
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; IR: store i8 [[Load]], i8* [[DstGep]]
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; IR: [[IndexInc]] = add i64 %loop-index, 1
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; IR: [[Cond2:%[0-9]+]] = icmp ult i64 [[IndexInc]], %n
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; IR: br i1 [[Cond2]], label %loop-memcpy-expansion, label %post-loop-memcpy-expansion
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; IR-LABEL: post-loop-memcpy-expansion:
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; IR: ret i8* %dst
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; PTX-LABEL: .visible .func (.param .b64 func_retval0) memcpy_caller
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; PTX: LBB[[LABEL:[_0-9]+]]:
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; PTX: ld.u8 %rs[[REG:[0-9]+]]
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; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[REG]]
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; PTX: add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
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; PTX: setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
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; PTX: @%p[[PRED]] bra LBB[[LABEL]]
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}
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define i8* @memcpy_volatile_caller(i8* %dst, i8* %src, i64 %n) #0 {
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %n, i1 true)
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ret i8* %dst
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; IR-LABEL: @memcpy_volatile_caller
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; IR: entry:
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; IR: [[Cond:%[0-9]+]] = icmp ne i64 %n, 0
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; IR: br i1 [[Cond]], label %loop-memcpy-expansion, label %post-loop-memcpy-expansion
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; IR: loop-memcpy-expansion:
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; IR: %loop-index = phi i64 [ 0, %entry ], [ [[IndexInc:%[0-9]+]], %loop-memcpy-expansion ]
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; IR: [[SrcGep:%[0-9]+]] = getelementptr inbounds i8, i8* %src, i64 %loop-index
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; IR: [[Load:%[0-9]+]] = load volatile i8, i8* [[SrcGep]]
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; IR: [[DstGep:%[0-9]+]] = getelementptr inbounds i8, i8* %dst, i64 %loop-index
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; IR: store volatile i8 [[Load]], i8* [[DstGep]]
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; IR: [[IndexInc]] = add i64 %loop-index, 1
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; IR: [[Cond2:%[0-9]+]] = icmp ult i64 [[IndexInc]], %n
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; IR: br i1 [[Cond2]], label %loop-memcpy-expansion, label %post-loop-memcpy-expansion
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; IR-LABEL: post-loop-memcpy-expansion:
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; IR: ret i8* %dst
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; PTX-LABEL: .visible .func (.param .b64 func_retval0) memcpy_volatile_caller
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; PTX: LBB[[LABEL:[_0-9]+]]:
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; PTX: ld.volatile.u8 %rs[[REG:[0-9]+]]
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; PTX: st.volatile.u8 [%rd{{[0-9]+}}], %rs[[REG]]
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; PTX: add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
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; PTX: setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
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; PTX: @%p[[PRED]] bra LBB[[LABEL]]
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}
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define i8* @memcpy_casting_caller(i32* %dst, i32* %src, i64 %n) #0 {
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entry:
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%0 = bitcast i32* %dst to i8*
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%1 = bitcast i32* %src to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 %n, i1 false)
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ret i8* %0
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; Check that casts in calls to memcpy are handled properly
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; IR-LABEL: @memcpy_casting_caller
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; IR: [[DSTCAST:%[0-9]+]] = bitcast i32* %dst to i8*
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; IR: [[SRCCAST:%[0-9]+]] = bitcast i32* %src to i8*
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; IR: getelementptr inbounds i8, i8* [[SRCCAST]]
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; IR: getelementptr inbounds i8, i8* [[DSTCAST]]
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}
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define i8* @memcpy_known_size(i8* %dst, i8* %src) {
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 144, i1 false)
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ret i8* %dst
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; Check that calls with compile-time constant size are handled correctly
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; IR-LABEL: @memcpy_known_size
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; IR: entry:
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; IR: br label %load-store-loop
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; IR: load-store-loop:
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; IR: %loop-index = phi i64 [ 0, %entry ], [ [[IndexInc:%[0-9]+]], %load-store-loop ]
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; IR: [[SrcGep:%[0-9]+]] = getelementptr inbounds i8, i8* %src, i64 %loop-index
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; IR: [[Load:%[0-9]+]] = load i8, i8* [[SrcGep]]
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; IR: [[DstGep:%[0-9]+]] = getelementptr inbounds i8, i8* %dst, i64 %loop-index
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; IR: store i8 [[Load]], i8* [[DstGep]]
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; IR: [[IndexInc]] = add i64 %loop-index, 1
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; IR: [[Cond:%[0-9]+]] = icmp ult i64 %3, 144
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; IR: br i1 [[Cond]], label %load-store-loop, label %memcpy-split
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}
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define i8* @memset_caller(i8* %dst, i32 %c, i64 %n) #0 {
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entry:
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%0 = trunc i32 %c to i8
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tail call void @llvm.memset.p0i8.i64(i8* %dst, i8 %0, i64 %n, i1 false)
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ret i8* %dst
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; IR-LABEL: @memset_caller
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; IR: [[VAL:%[0-9]+]] = trunc i32 %c to i8
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; IR: [[CMPREG:%[0-9]+]] = icmp eq i64 0, %n
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; IR: br i1 [[CMPREG]], label %split, label %loadstoreloop
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; IR: loadstoreloop:
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; IR: [[STOREPTR:%[0-9]+]] = getelementptr inbounds i8, i8* %dst, i64
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; IR-NEXT: store i8 [[VAL]], i8* [[STOREPTR]]
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; PTX-LABEL: .visible .func (.param .b64 func_retval0) memset_caller(
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; PTX: ld.param.u32 %r[[C:[0-9]+]]
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; PTX: cvt.u16.u32 %rs[[REG:[0-9]+]], %r[[C]];
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; PTX: LBB[[LABEL:[_0-9]+]]:
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; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[REG]]
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; PTX: add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
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; PTX: setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
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; PTX: @%p[[PRED]] bra LBB[[LABEL]]
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}
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define i8* @volatile_memset_caller(i8* %dst, i32 %c, i64 %n) #0 {
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entry:
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%0 = trunc i32 %c to i8
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tail call void @llvm.memset.p0i8.i64(i8* %dst, i8 %0, i64 %n, i1 true)
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ret i8* %dst
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; IR-LABEL: @volatile_memset_caller
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; IR: [[VAL:%[0-9]+]] = trunc i32 %c to i8
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; IR: loadstoreloop:
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; IR: [[STOREPTR:%[0-9]+]] = getelementptr inbounds i8, i8* %dst, i64
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; IR-NEXT: store volatile i8 [[VAL]], i8* [[STOREPTR]]
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}
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define i8* @memmove_caller(i8* %dst, i8* %src, i64 %n) #0 {
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entry:
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tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %n, i1 false)
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ret i8* %dst
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; IR-LABEL: @memmove_caller
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; IR: icmp ult i8* %src, %dst
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; IR: [[PHIVAL:%[0-9a-zA-Z_]+]] = phi i64
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; IR-NEXT: %index_ptr = sub i64 [[PHIVAL]], 1
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; IR: [[FWDPHIVAL:%[0-9a-zA-Z_]+]] = phi i64
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; IR: {{%[0-9a-zA-Z_]+}} = add i64 [[FWDPHIVAL]], 1
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; PTX-LABEL: .visible .func (.param .b64 func_retval0) memmove_caller(
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; PTX: ld.param.u64 %rd[[N:[0-9]+]]
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; PTX-DAG: setp.eq.s64 %p[[NEQ0:[0-9]+]], %rd[[N]], 0
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; PTX-DAG: setp.ge.u64 %p[[SRC_GT_THAN_DST:[0-9]+]], %rd{{[0-9]+}}, %rd{{[0-9]+}}
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; PTX-NEXT: @%p[[SRC_GT_THAN_DST]] bra LBB[[FORWARD_BB:[0-9_]+]]
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; -- this is the backwards copying BB
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; PTX: @%p[[NEQ0]] bra LBB[[EXIT:[0-9_]+]]
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; PTX: add.s64 %rd{{[0-9]}}, %rd{{[0-9]}}, -1
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; PTX: ld.u8 %rs[[ELEMENT:[0-9]+]]
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; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[ELEMENT]]
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; -- this is the forwards copying BB
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; PTX: LBB[[FORWARD_BB]]:
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; PTX: @%p[[NEQ0]] bra LBB[[EXIT]]
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; PTX: ld.u8 %rs[[ELEMENT2:[0-9]+]]
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; PTX: st.u8 [%rd{{[0-9]+}}], %rs[[ELEMENT2]]
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; PTX: add.s64 %rd{{[0-9]+}}, %rd{{[0-9]+}}, 1
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; -- exit block
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; PTX: LBB[[EXIT]]:
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; PTX-NEXT: st.param.b64 [func_retval0
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; PTX-NEXT: ret
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}
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