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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/utils/TableGen
Chris Lattner c4ab50bd33 move tier out of an anonymous namespace, it doesn't make sense
to for it to be an an anon namespace and be in a header.

Eliminate some extraenous uses of tie.

llvm-svn: 135669
2011-07-21 06:21:31 +00:00
..
ARMDecoderEmitter.cpp Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler. 2011-07-18 23:25:34 +00:00
ARMDecoderEmitter.h
AsmMatcherEmitter.cpp Have tblgen produce code that tolerates operands that return an invalid match class. 2011-07-15 18:30:43 +00:00
AsmMatcherEmitter.h
AsmWriterEmitter.cpp
AsmWriterEmitter.h
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CallingConvEmitter.h
ClangASTNodesEmitter.cpp
ClangASTNodesEmitter.h
ClangAttrEmitter.cpp
ClangAttrEmitter.h
ClangDiagnosticsEmitter.cpp
ClangDiagnosticsEmitter.h
ClangSACheckersEmitter.cpp
ClangSACheckersEmitter.h
CMakeLists.txt
CodeEmitterGen.cpp
CodeEmitterGen.h
CodeGenDAGPatterns.cpp Intern all RecTy subclass instances to avoid duplicates. 2011-07-18 17:02:57 +00:00
CodeGenDAGPatterns.h struct Init -> class Init 2011-07-13 22:25:51 +00:00
CodeGenInstruction.cpp move tier out of an anonymous namespace, it doesn't make sense 2011-07-21 06:21:31 +00:00
CodeGenInstruction.h Add a new field to MCOperandInfo that contains information about the type of the Operand. 2011-07-14 21:47:18 +00:00
CodeGenIntrinsics.h
CodeGenRegisters.cpp Intern all RecTy subclass instances to avoid duplicates. 2011-07-18 17:02:57 +00:00
CodeGenRegisters.h
CodeGenTarget.cpp
CodeGenTarget.h
DAGISelEmitter.cpp
DAGISelEmitter.h
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DisassemblerEmitter.cpp
DisassemblerEmitter.h
EDEmitter.cpp ARM PKH shift ammount operand printing tweaks. 2011-07-20 21:40:26 +00:00
EDEmitter.h
Error.cpp
Error.h
FastISelEmitter.cpp
FastISelEmitter.h
FixedLenDecoderEmitter.cpp Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM. 2011-07-19 21:06:00 +00:00
FixedLenDecoderEmitter.h Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM. 2011-07-19 21:06:00 +00:00
InstrEnumEmitter.cpp
InstrEnumEmitter.h
InstrInfoEmitter.cpp Eliminate "const" from extern const to fix breakeage since r135184 on msvc. 2011-07-15 12:50:21 +00:00
InstrInfoEmitter.h
IntrinsicEmitter.cpp Change Intrinsic::getDeclaration and friends to take an ArrayRef. 2011-07-14 17:45:39 +00:00
IntrinsicEmitter.h
LLVMCConfigurationEmitter.cpp though it isn't the case here, the key of a StringMap can 2011-07-14 18:21:58 +00:00
LLVMCConfigurationEmitter.h
Makefile
NeonEmitter.cpp
NeonEmitter.h
OptParserEmitter.cpp
OptParserEmitter.h
PseudoLoweringEmitter.cpp
PseudoLoweringEmitter.h
Record.cpp Intern all RecTy subclass instances to avoid duplicates. 2011-07-18 17:02:57 +00:00
Record.h Intern all RecTy subclass instances to avoid duplicates. 2011-07-18 17:02:57 +00:00
RegisterInfoEmitter.cpp Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 2011-07-18 20:57:22 +00:00
RegisterInfoEmitter.h Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 2011-07-18 20:57:22 +00:00
SetTheory.cpp
SetTheory.h struct Init -> class Init 2011-07-13 22:25:51 +00:00
StringMatcher.cpp
StringMatcher.h
StringToOffsetTable.h
SubtargetEmitter.cpp Eliminate "const" from extern const to fix breakeage since r135184 on msvc. 2011-07-15 12:50:21 +00:00
SubtargetEmitter.h
TableGen.cpp
TableGenBackend.cpp
TableGenBackend.h
TGLexer.cpp
TGLexer.h
TGParser.cpp Intern all RecTy subclass instances to avoid duplicates. 2011-07-18 17:02:57 +00:00
TGParser.h Intern all RecTy subclass instances to avoid duplicates. 2011-07-18 17:02:57 +00:00
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.h
X86RecognizableInstr.cpp Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873. 2011-07-16 02:41:28 +00:00
X86RecognizableInstr.h Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873. 2011-07-16 02:41:28 +00:00