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https://github.com/RPCS3/llvm-mirror.git
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8b58bcf73c
At the point when we perform `emitTransformedIndex`, we have a broken IR (in particular, we have Phis for which not every incoming value is properly set). On such IR, it is illegal to create SCEV expressions, because their internal simplification process may try to prove some predicates and break when it stumbles across some broken IR. The only purpose of using SCEV in this particular place is attempt to simplify the generated code slightly. It seems that the result isn't worth it, because some trivial cases (like addition of zero and multiplication by 1) can be handled separately if needed, but more generally InstCombine is able to achieve the goals we want to achieve by using SCEV. This patch fixes a functional crash described in PR39160, and as side-effect it also generates a bit smarter code in some simple cases. It also may cause some optimality loss (i.e. we will now generate `mul` by power of `2` instead of shift etc), but there is nothing what InstCombine could not handle later. In case of dire need, we can support more trivial cases just in place. Note that this patch only fixes one particular case of the general problem that LV misuses SCEV, attempting to create SCEVs or prove predicates on invalid IR. The general solution, however, seems complex enough. Differential Revision: https://reviews.llvm.org/D52881 Reviewed By: fhahn, hsaito llvm-svn: 343954
177 lines
4.9 KiB
LLVM
177 lines
4.9 KiB
LLVM
; RUN: opt -S -loop-vectorize -force-vector-interleave=1 -force-vector-width=2 < %s | FileCheck %s
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; CHECK-LABEL: @postinc
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; CHECK-LABEL: scalar.ph:
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; CHECK: %bc.resume.val = phi i32 [ %n.vec, %middle.block ], [ 0, %entry ]
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; CHECK-LABEL: for.end:
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; CHECK: %[[RET:.*]] = phi i32 [ {{.*}}, %for.body ], [ %n.vec, %middle.block ]
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; CHECK: ret i32 %[[RET]]
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define i32 @postinc(i32 %k) {
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entry:
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br label %for.body
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for.body:
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%inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%inc = add nsw i32 %inc.phi, 1
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%cmp = icmp eq i32 %inc, %k
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br i1 %cmp, label %for.end, label %for.body
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for.end:
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ret i32 %inc
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}
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; CHECK-LABEL: @preinc
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; CHECK-LABEL: middle.block:
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; CHECK: %[[v3:.+]] = sub i32 %n.vec, 1
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; CHECK-LABEL: scalar.ph:
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; CHECK: %bc.resume.val = phi i32 [ %n.vec, %middle.block ], [ 0, %entry ]
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; CHECK-LABEL: for.end:
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; CHECK: %[[RET:.*]] = phi i32 [ {{.*}}, %for.body ], [ %[[v3]], %middle.block ]
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; CHECK: ret i32 %[[RET]]
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define i32 @preinc(i32 %k) {
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entry:
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br label %for.body
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for.body:
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%inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%inc = add nsw i32 %inc.phi, 1
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%cmp = icmp eq i32 %inc, %k
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br i1 %cmp, label %for.end, label %for.body
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for.end:
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ret i32 %inc.phi
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}
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; CHECK-LABEL: @constpre
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; CHECK-LABEL: for.end:
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; CHECK: %[[RET:.*]] = phi i32 [ {{.*}}, %for.body ], [ 2, %middle.block ]
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; CHECK: ret i32 %[[RET]]
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define i32 @constpre() {
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entry:
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br label %for.body
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for.body:
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%inc.phi = phi i32 [ 32, %entry ], [ %inc, %for.body ]
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%inc = sub nsw i32 %inc.phi, 2
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%cmp = icmp eq i32 %inc, 0
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br i1 %cmp, label %for.end, label %for.body
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for.end:
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ret i32 %inc.phi
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}
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; CHECK-LABEL: @geppre
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; CHECK-LABEL: middle.block:
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; CHECK: %ind.escape = getelementptr i32, i32* %ptr, i64 124
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; CHECK-LABEL: for.end:
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; CHECK: %[[RET:.*]] = phi i32* [ {{.*}}, %for.body ], [ %ind.escape, %middle.block ]
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; CHECK: ret i32* %[[RET]]
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define i32* @geppre(i32* %ptr) {
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entry:
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br label %for.body
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for.body:
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%inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%ptr.phi = phi i32* [ %ptr, %entry ], [ %inc.ptr, %for.body ]
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%inc = add nsw i32 %inc.phi, 1
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%inc.ptr = getelementptr i32, i32* %ptr.phi, i32 4
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%cmp = icmp eq i32 %inc, 32
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br i1 %cmp, label %for.end, label %for.body
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for.end:
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ret i32* %ptr.phi
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}
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; CHECK-LABEL: @both
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; CHECK-LABEL: middle.block:
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; CHECK: %[[END:.*]] = sub i64 %n.vec, 1
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; CHECK: %ind.escape = getelementptr i32, i32* %base, i64 %[[END]]
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; CHECK-LABEL: for.end:
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; CHECK: %[[RET:.*]] = phi i32* [ %inc.lag1, %for.body ], [ %ind.escape, %middle.block ]
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; CHECK: ret i32* %[[RET]]
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define i32* @both(i32 %k) {
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entry:
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%base = getelementptr inbounds i32, i32* undef, i64 1
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br label %for.body
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for.body:
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%inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%inc.lag1 = phi i32* [ %base, %entry ], [ %tmp, %for.body]
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%inc.lag2 = phi i32* [ undef, %entry ], [ %inc.lag1, %for.body]
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%tmp = getelementptr inbounds i32, i32* %inc.lag1, i64 1
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%inc = add nsw i32 %inc.phi, 1
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%cmp = icmp eq i32 %inc, %k
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br i1 %cmp, label %for.end, label %for.body
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for.end:
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ret i32* %inc.lag1
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}
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; CHECK-LABEL: @multiphi
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; CHECK-LABEL: scalar.ph:
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; CHECK: %bc.resume.val = phi i32 [ %n.vec, %middle.block ], [ 0, %entry ]
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; CHECK-LABEL: for.end:
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; CHECK: %phi = phi i32 [ {{.*}}, %for.body ], [ %n.vec, %middle.block ]
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; CHECK: %phi2 = phi i32 [ {{.*}}, %for.body ], [ %n.vec, %middle.block ]
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; CHECK: store i32 %phi2, i32* %p
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; CHECK: ret i32 %phi
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define i32 @multiphi(i32 %k, i32* %p) {
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entry:
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br label %for.body
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for.body:
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%inc.phi = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%inc = add nsw i32 %inc.phi, 1
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%cmp = icmp eq i32 %inc, %k
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br i1 %cmp, label %for.end, label %for.body
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for.end:
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%phi = phi i32 [ %inc, %for.body ]
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%phi2 = phi i32 [ %inc, %for.body ]
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store i32 %phi2, i32* %p
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ret i32 %phi
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}
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; CHECK-LABEL: @PR30742
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; CHECK: %[[T15:.+]] = add nsw i32 %tmp03, -7
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; CHECK: vector.ph
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; CHECK: %[[N_MOD_VF:.+]] = urem i32 %[[T5:.+]], 2
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; CHECK: %[[N_VEC:.+]] = sub i32 %[[T5]], %[[N_MOD_VF]]
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; CHECK: middle.block
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; CHECK: %[[CMP:.+]] = icmp eq i32 %[[T5]], %[[N_VEC]]
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; CHECK: %ind.escape = add i32 %[[T15]],
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; CHECK: br i1 %[[CMP]], label %BB3, label %scalar.ph
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define void @PR30742() {
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BB0:
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br label %BB1
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BB1:
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%tmp00 = load i32, i32* undef, align 16
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%tmp01 = sub i32 %tmp00, undef
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%tmp02 = icmp slt i32 %tmp01, 1
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%tmp03 = select i1 %tmp02, i32 1, i32 %tmp01
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%tmp04 = add nsw i32 %tmp03, -7
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br label %BB2
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BB2:
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%tmp05 = phi i32 [ %tmp04, %BB1 ], [ %tmp06, %BB2 ]
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%tmp06 = add i32 %tmp05, -8
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%tmp07 = icmp sgt i32 %tmp06, 0
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br i1 %tmp07, label %BB2, label %BB3
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BB3:
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%tmp08 = phi i32 [ %tmp05, %BB2 ]
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%tmp09 = sub i32 %tmp00, undef
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%tmp10 = icmp slt i32 %tmp09, 1
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%tmp11 = select i1 %tmp10, i32 1, i32 %tmp09
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%tmp12 = add nsw i32 %tmp11, -7
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br label %BB4
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BB4:
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%tmp13 = phi i32 [ %tmp12, %BB3 ], [ %tmp14, %BB4 ]
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%tmp14 = add i32 %tmp13, -8
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%tmp15 = icmp sgt i32 %tmp14, 0
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br i1 %tmp15, label %BB4, label %BB1
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}
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