Chad Rosier c526d67f62 [AArch64] Remove command-line option use for testing. ... The EXTR combine has been in tree for over 2 years without complain, so go ahead and remove the option. llvm-svn: 269292		2016-05-12 13:27:24 +00:00
..
AArch64	[AArch64] Remove command-line option use for testing.	2016-05-12 13:27:24 +00:00
AMDGPU	AMDGPU: Fix breaking IR on instructions with multiple pointer operands	2016-05-12 01:58:58 +00:00
ARM	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
BPF
Generic	llc: Rework -run-pass option	2016-05-10 01:32:44 +00:00
Hexagon	[Hexagon] Use offsets relative to FP+8 in .cfi_offset instructions	2016-05-11 14:53:07 +00:00
Inputs
Lanai
Mips	Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"	2016-05-12 12:46:06 +00:00
MIR	ARM: fix handling of SUB immediates in peephole opt.	2016-05-02 18:30:08 +00:00
MSP430
NVPTX	[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection	2016-05-02 18:12:02 +00:00
PowerPC	[PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc	2016-05-12 04:00:56 +00:00
SPARC	[Sparc][LEON] Itineraries unit test.	2016-05-10 09:09:20 +00:00
SystemZ	[PR27599] [SystemZ] [SelectionDAG] Fix extension of atomic cmpxchg result.	2016-05-10 16:49:04 +00:00
Thumb	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
Thumb2	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
WebAssembly	[WebAssembly] Fast-isel support for calls, arguments, and selects.	2016-05-12 04:19:09 +00:00
WinEH
X86	[SelectionDAG] Attempt to split BITREVERSE vector legalization into BSWAP and BITREVERSE stages	2016-05-12 13:09:49 +00:00
XCore