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132 lines
5.3 KiB
C++
132 lines
5.3 KiB
C++
//===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Subclass of MipsDAGToDAGISel specialized for mips32/64.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
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#define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
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#include "MipsISelDAGToDAG.h"
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namespace llvm {
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class MipsSEDAGToDAGISel : public MipsDAGToDAGISel {
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public:
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explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {}
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private:
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bool runOnMachineFunction(MachineFunction &MF) override;
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void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
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MachineFunction &MF);
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unsigned getMSACtrlReg(const SDValue RegIdx) const;
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bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
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std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl,
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EVT Ty, bool HasLo, bool HasHi);
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SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
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SDLoc DL, SDNode *Node) const;
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bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
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bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
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unsigned OffsetBits) const;
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bool selectAddrRegImm(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectAddrRegReg(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectAddrDefault(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddr(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectAddrRegImm9(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectAddrRegImm10(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectAddrRegImm12(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectAddrRegImm16(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectIntAddrMM(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrMSA(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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/// \brief Select constant vector splats.
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bool selectVSplat(SDNode *N, APInt &Imm,
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unsigned MinSizeInBits) const override;
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/// \brief Select constant vector splats whose value fits in a given integer.
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bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed,
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unsigned ImmBitSize) const;
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/// \brief Select constant vector splats whose value fits in a uimm1.
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bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm2.
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bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm3.
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bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm4.
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bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm5.
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bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm6.
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bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm8.
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bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a simm5.
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bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is a power of 2.
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bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is the inverse of a
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/// power of 2.
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bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is a run of set bits
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/// ending at the most significant bit
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bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is a run of set bits
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/// starting at bit zero.
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bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
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std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
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void processFunctionAfterISel(MachineFunction &MF) override;
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// Insert instructions to initialize the global base register in the
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// first MBB of the function.
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void initGlobalBaseReg(MachineFunction &MF);
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bool SelectInlineAsmMemoryOperand(const SDValue &Op,
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unsigned ConstraintID,
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std::vector<SDValue> &OutOps) override;
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};
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FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM);
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}
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#endif
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