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llvm-mirror/test/Analysis
Roman Lebedev ab22644f5b [SCEV] ScalarEvolution::createSCEV(): clarify no-wrap flag propagation for shift by bitwidth-1
Summary:
There was this comment here previously:
```
-        // It is currently not resolved how to interpret NSW for left
-        // shift by BitWidth - 1, so we avoid applying flags in that
-        // case. Remove this check (or this comment) once the situation
-        // is resolved. See
-        // http://lists.llvm.org/pipermail/llvm-dev/2015-April/084195.html
-        // and http://reviews.llvm.org/D8890 .
```
But langref was fixed in rL286785, and the behavior is pretty obvious:
http://volta.cs.utah.edu:8080/z/MM4WZP
^ nuw can always be propagated. nsw can be propagated if
either nuw is specified, or the shift is by *less* than bitwidth-1.

This mimics similar D81189 Reassociate change, alive2 is happy about that one.

I'm not sure `NUW` isn't being printed, but that seems unrelated.

Reviewers: mkazantsev, reames, sanjoy, nlopes, craig.topper, efriedma

Reviewed By: efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81243
2020-06-06 13:02:07 +03:00
..
AliasSet [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
AssumptionCache
BasicAA [BasicAA] Use known lower bounds for index values for size based check. 2020-05-30 16:20:42 +01:00
BlockFrequencyInfo
BranchProbabilityInfo Extend InvokeInst !prof branch_weights metadata to unwind branches 2020-06-04 15:37:15 +07:00
CallGraph [Tests] Migrate a number of tests to gc-live bundle representation 2020-06-05 16:44:04 -07:00
CFLAliasAnalysis
ConstantFolding [AMDGPU] Fold llvm.amdgcn.cos and llvm.amdgcn.sin intrinsics (fix tests) 2020-06-03 11:40:52 +01:00
CostModel [NFC][ARM][AArch64] Test runs 2020-06-02 09:05:30 +01:00
DDG [DDG] Data Dependence Graph - Graph Simplification 2020-02-19 13:41:51 -05:00
Delinearization Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
DemandedBits
DependenceAnalysis Require "target datalayout" to be at the beginning of an IR file. 2020-04-20 11:55:49 -07:00
DivergenceAnalysis [AMDGPU] New llvm.amdgcn.ballot intrinsic 2020-03-31 10:35:39 +02:00
DominanceFrontier
Dominators
GlobalsModRef Revert a107f86 "[GlobalsAA] Add back a check to intrinsic_addresstaken.ll to see if the AVX and AVX512 bots still fail for it." 2020-01-24 13:15:23 -08:00
IVUsers
LazyCallGraph [Tests] Migrate a number of tests to gc-live bundle representation 2020-06-05 16:44:04 -07:00
LazyValueAnalysis [LVI] Don't require DominatorTree in LVI (NFC) 2020-05-19 20:21:46 +02:00
LegacyDivergenceAnalysis Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI 2020-01-24 10:39:40 -08:00
Lint
LoopAccessAnalysis
LoopCacheAnalysis/PowerPC [LoopCacheAnalysis]: Add support for negative stride 2020-02-10 13:22:35 -05:00
LoopInfo
LoopNestAnalysis [LoopNest]: Analysis to discover properties of a loop nest. 2020-03-03 18:25:19 +00:00
MemoryDependenceAnalysis Infer alignment of unmarked loads in IR/bitcode parsing. 2020-05-14 13:03:50 -07:00
MemorySSA StoreInst should store Align, not MaybeAlign 2020-05-15 12:26:58 -07:00
MustExecute Infer alignment of unmarked loads in IR/bitcode parsing. 2020-05-14 13:03:50 -07:00
PhiValues
PostDominators
ProfileSummary
RegionInfo
ScalarEvolution [SCEV] ScalarEvolution::createSCEV(): clarify no-wrap flag propagation for shift by bitwidth-1 2020-06-06 13:02:07 +03:00
ScopedNoAliasAA
StackSafetyAnalysis [StackSafety,NFC] Switch tests to aarch64 2020-06-05 00:24:02 -07:00
TypeBasedAliasAnalysis Infer alignment of unmarked loads in IR/bitcode parsing. 2020-05-14 13:03:50 -07:00
ValueTracking [Tests] Migrate a number of tests to gc-live bundle representation 2020-06-05 16:44:04 -07:00
alias-analysis-uses.ll