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9f8aefe66d
Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16863 llvm-svn: 259897
90 lines
2.9 KiB
C++
90 lines
2.9 KiB
C++
//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
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#define LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
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#include "AMDGPUFrameLowering.h"
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPUIntrinsicInfo.h"
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#include "AMDGPUSubtarget.h"
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#include "R600ISelLowering.h"
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#include "llvm/IR/DataLayout.h"
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namespace llvm {
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//===----------------------------------------------------------------------===//
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// AMDGPU Target Machine (R600+)
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//===----------------------------------------------------------------------===//
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class AMDGPUTargetMachine : public LLVMTargetMachine {
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private:
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protected:
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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AMDGPUSubtarget Subtarget;
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AMDGPUIntrinsicInfo IntrinsicInfo;
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public:
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AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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~AMDGPUTargetMachine();
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const AMDGPUSubtarget *getSubtargetImpl() const { return &Subtarget; }
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const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override {
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return &Subtarget;
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}
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const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
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return &IntrinsicInfo;
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}
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TargetIRAnalysis getTargetIRAnalysis() override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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};
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//===----------------------------------------------------------------------===//
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// R600 Target Machine (R600 -> Cayman)
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//===----------------------------------------------------------------------===//
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class R600TargetMachine : public AMDGPUTargetMachine {
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public:
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R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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};
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//===----------------------------------------------------------------------===//
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// GCN Target Machine (SI+)
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//===----------------------------------------------------------------------===//
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class GCNTargetMachine : public AMDGPUTargetMachine {
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public:
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GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL);
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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};
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} // End namespace llvm
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#endif
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