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llvm-mirror/test/tools/llvm-exegesis
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Vy Nguyen 86e9087897 [llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements. 
Starting with Skylake, the LBR contains the precise number of cycles between the two
    consecutive branches.
    Making use of this will hopefully make the measurements more precise than the
    existing methods of using RDTSC.

            Differential Revision: https://reviews.llvm.org/D77422
2020-07-16 12:12:46 -04:00
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AArch64
Mips
X86 [llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements. 2020-07-16 12:12:46 -04:00
lit.local.cfg