| .. |
|
AsmMatcherEmitter.cpp
|
[Tablegen] Optimize isSubsetOf() in AsmMatcherEmitter.cpp. NFC
|
2018-07-13 16:36:14 +00:00 |
|
AsmWriterEmitter.cpp
|
[TableGen] Prevent double flattening of InstAlias asm strings in the asm matcher emitter.
|
2018-06-18 01:28:01 +00:00 |
|
AsmWriterInst.cpp
|
|
|
|
AsmWriterInst.h
|
|
|
|
Attributes.cpp
|
Remove redundant includes from utils/TableGen.
|
2017-12-13 21:31:13 +00:00 |
|
CallingConvEmitter.cpp
|
[TableGen] Simplify CallingConvEmitter.cpp. NFC.
|
2017-10-16 14:52:26 +00:00 |
|
CMakeLists.txt
|
[WebAssembly] TableGen backend for stackifying instructions
|
2018-08-27 22:02:09 +00:00 |
|
CodeEmitterGen.cpp
|
|
|
|
CodeGenDAGPatterns.cpp
|
Remove debug code accidently committed in rL340837. NFCI.
|
2018-08-29 10:10:58 +00:00 |
|
CodeGenDAGPatterns.h
|
[TableGen] TypeInfer - Cache the legal types as TypeSetByHwMode
|
2018-08-17 15:54:07 +00:00 |
|
CodeGenHwModes.cpp
|
TableGen support for parameterized register class information
|
2017-09-14 16:56:21 +00:00 |
|
CodeGenHwModes.h
|
TableGen support for parameterized register class information
|
2017-09-14 16:56:21 +00:00 |
|
CodeGenInstruction.cpp
|
[WebAssembly] Add isEHScopeReturn instruction property
|
2018-08-21 19:44:11 +00:00 |
|
CodeGenInstruction.h
|
[WebAssembly] Add isEHScopeReturn instruction property
|
2018-08-21 19:44:11 +00:00 |
|
CodeGenIntrinsics.h
|
Fix layering of MachineValueType.h by moving it from CodeGen to Support
|
2018-03-23 23:58:25 +00:00 |
|
CodeGenMapTable.cpp
|
[mips] Improve diagnostics for instruction mapping
|
2018-01-08 16:25:40 +00:00 |
|
CodeGenRegisters.cpp
|
[X86] Add phony registers for high halves of regs with low halves
|
2018-07-02 19:05:09 +00:00 |
|
CodeGenRegisters.h
|
[TableGen] Return ValueTypeByHwMode by const reference from CodeGenRegisterClass::getValueTypeNum
|
2018-08-16 15:29:24 +00:00 |
|
CodeGenSchedule.cpp
|
[Tablegen][MCInstPredicate] Removed redundant template argument from class TIIPredicate, and implemented verification rules for TIIPredicates.
|
2018-08-14 18:36:54 +00:00 |
|
CodeGenSchedule.h
|
[Tablegen][MCInstPredicate] Removed redundant template argument from class TIIPredicate, and implemented verification rules for TIIPredicates.
|
2018-08-14 18:36:54 +00:00 |
|
CodeGenTarget.cpp
|
[GlobalISel][Tablegen] Assign small opcodes to pseudos
|
2018-05-23 22:10:21 +00:00 |
|
CodeGenTarget.h
|
[GlobalISel][Tablegen] Assign small opcodes to pseudos
|
2018-05-23 22:10:21 +00:00 |
|
CTagsEmitter.cpp
|
[TableGen] Change std::sort to llvm::sort in response to r327219
|
2018-04-06 20:18:05 +00:00 |
|
DAGISelEmitter.cpp
|
[TableGen] Support multi-alternative pattern fragments
|
2018-07-13 13:18:00 +00:00 |
|
DAGISelMatcher.cpp
|
Remove redundant includes from utils/TableGen.
|
2017-12-13 21:31:13 +00:00 |
|
DAGISelMatcher.h
|
Fix layering of MachineValueType.h by moving it from CodeGen to Support
|
2018-03-23 23:58:25 +00:00 |
|
DAGISelMatcherEmitter.cpp
|
[SelectionDAG] Add a isel matcher op to check the type of node results other than result 0.
|
2017-11-22 07:11:01 +00:00 |
|
DAGISelMatcherGen.cpp
|
[TableGen] Return ValueTypeByHwMode by const reference from CodeGenRegisterClass::getValueTypeNum
|
2018-08-16 15:29:24 +00:00 |
|
DAGISelMatcherOpt.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
DFAPacketizerEmitter.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
DisassemblerEmitter.cpp
|
[WebAssembly] Initial Disassembler.
|
2018-05-10 22:16:44 +00:00 |
|
FastISelEmitter.cpp
|
[TableGen] Use std::move where possible in InstructionMemo constructor. NFCI.
|
2018-08-28 11:10:27 +00:00 |
|
FixedLenDecoderEmitter.cpp
|
[windows] Don't inline fieldFromInstruction on Windows
|
2018-07-25 17:33:20 +00:00 |
|
GlobalISelEmitter.cpp
|
[globalisel] Remove dead code from GlobalISelEmitter
|
2018-08-12 21:49:42 +00:00 |
|
InfoByHwMode.cpp
|
[TableGen] Change std::sort to llvm::sort in response to r327219
|
2018-04-06 20:18:05 +00:00 |
|
InfoByHwMode.h
|
[TableGen] Don't separately search for DefaultMode when we're going to iterate the set anyway. NFCI.
|
2018-08-17 17:45:15 +00:00 |
|
InstrDocsEmitter.cpp
|
[WebAssembly] Add isEHScopeReturn instruction property
|
2018-08-21 19:44:11 +00:00 |
|
InstrInfoEmitter.cpp
|
[WebAssembly] Add isEHScopeReturn instruction property
|
2018-08-21 19:44:11 +00:00 |
|
IntrinsicEmitter.cpp
|
[Power9] Add __float128 builtins for Round To Odd
|
2018-07-09 18:50:06 +00:00 |
|
LLVMBuild.txt
|
Add missing dependency (headers are included from MC, so a link dependency could exist easily enough)
|
2018-03-29 00:29:43 +00:00 |
|
OptParserEmitter.cpp
|
|
|
|
PredicateExpander.cpp
|
[Tablegen][MCInstPredicate] Removed redundant template argument from class TIIPredicate, and implemented verification rules for TIIPredicates.
|
2018-08-14 18:36:54 +00:00 |
|
PredicateExpander.h
|
[Tablegen][MCInstPredicate] Removed redundant template argument from class TIIPredicate, and implemented verification rules for TIIPredicates.
|
2018-08-14 18:36:54 +00:00 |
|
PseudoLoweringEmitter.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
RegisterBankEmitter.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
RegisterInfoEmitter.cpp
|
[MC] Remove PhysRegSize from MCRegisterClass
|
2018-08-09 15:19:07 +00:00 |
|
RISCVCompressInstEmitter.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
SDNodeProperties.cpp
|
TableGen: Allow setting SDNodeProperties on intrinsics
|
2017-12-20 19:36:28 +00:00 |
|
SDNodeProperties.h
|
TableGen: Allow setting SDNodeProperties on intrinsics
|
2017-12-20 19:36:28 +00:00 |
|
SearchableTableEmitter.cpp
|
TableGen/SearchableTables: Cast enums to unsigned in generated code
|
2018-08-23 08:02:02 +00:00 |
|
SequenceToOffsetTable.h
|
Remove usages of deprecated std::unary_function and std::binary_function.
|
2017-09-14 18:33:25 +00:00 |
|
SubtargetEmitter.cpp
|
[Tablegen][MCInstPredicate] Removed redundant template argument from class TIIPredicate, and implemented verification rules for TIIPredicates.
|
2018-08-14 18:36:54 +00:00 |
|
SubtargetFeatureInfo.cpp
|
IWYU for llvm-config.h in llvm, additions.
|
2018-04-30 14:59:11 +00:00 |
|
SubtargetFeatureInfo.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
TableGen.cpp
|
[WebAssembly] TableGen backend for stackifying instructions
|
2018-08-27 22:02:09 +00:00 |
|
TableGenBackends.h
|
[WebAssembly] TableGen backend for stackifying instructions
|
2018-08-27 22:02:09 +00:00 |
|
tdtags
|
|
|
|
Types.cpp
|
|
|
|
Types.h
|
|
|
|
WebAssemblyDisassemblerEmitter.cpp
|
[WebAssembly] Initial Disassembler.
|
2018-05-10 22:16:44 +00:00 |
|
WebAssemblyDisassemblerEmitter.h
|
[WebAssembly] Initial Disassembler.
|
2018-05-10 22:16:44 +00:00 |
|
WebAssemblyStackifierEmitter.cpp
|
[WebAssembly][NFC] Document stackifier tablegen backend
|
2018-08-28 18:49:47 +00:00 |
|
X86DisassemblerShared.h
|
[X86] Use unique_ptr to simplify memory management. NFC
|
2018-03-24 07:15:47 +00:00 |
|
X86DisassemblerTables.cpp
|
[X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode.
|
2018-04-22 00:52:02 +00:00 |
|
X86DisassemblerTables.h
|
[X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an attribute.
|
2018-03-24 07:48:54 +00:00 |
|
X86EVEX2VEXTablesEmitter.cpp
|
[X86] Add the ability to force an EVEX2VEX mapping table entry from the .td files. Remove remaining manual table entries from the tablegen emitter.
|
2018-06-19 04:24:44 +00:00 |
|
X86FoldTablesEmitter.cpp
|
[X86] More additions to the load folding tables based on the autogenerated tables.
|
2018-06-16 23:25:50 +00:00 |
|
X86ModRMFilters.cpp
|
|
|
|
X86ModRMFilters.h
|
|
|
|
X86RecognizableInstr.cpp
|
[X86] Don't ignore 0x66 prefix on relative jumps in 64-bit mode. Fix opcode selection of relative jumps in 16-bit mode. Treat jno/jo like other jcc instructions.
|
2018-08-13 22:06:28 +00:00 |
|
X86RecognizableInstr.h
|
[X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have VEX.W==1, but can be converted to their VEX equivalent that uses VEX.W==0.
|
2018-06-19 04:24:42 +00:00 |
