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5d51a489ae
(This is the second attempt to submit this patch. The first caused two assertion failures and was reverted. See https://llvm.org/bugs/show_bug.cgi?id=25687) The patch in http://reviews.llvm.org/D13745 is broken into four parts: 1. New interfaces without functional changes (http://reviews.llvm.org/D13908). 2. Use new interfaces in SelectionDAG, while in other passes treat probabilities as weights (http://reviews.llvm.org/D14361). 3. Use new interfaces in all other passes. 4. Remove old interfaces. This patch is 3+4 above. In this patch, MBB won't provide weight-based interfaces any more, which are totally replaced by probability-based ones. The interface addSuccessor() is redesigned so that the default probability is unknown. We allow unknown probabilities but don't allow using it together with known probabilities in successor list. That is to say, we either have a list of successors with all known probabilities, or all unknown probabilities. In the latter case, we assume each successor has 1/N probability where N is the number of successors. An assertion checks if the user is attempting to add a successor with the disallowed mixed use as stated above. This can help us catch many misuses. All uses of weight-based interfaces are now updated to use probability-based ones. Differential revision: http://reviews.llvm.org/D14973 llvm-svn: 254377
75 lines
2.3 KiB
LLVM
75 lines
2.3 KiB
LLVM
; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
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; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
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; Hexagon crashes (PR23377)
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; XFAIL: arm,aarch64,hexagon
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; Make sure we have the correct weight attached to each successor.
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define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
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; CHECK-LABEL: Machine code for function test2:
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entry:
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%conv = sext i32 %x to i64
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switch i64 %conv, label %return [
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i64 0, label %sw.bb
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i64 1, label %sw.bb
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i64 4, label %sw.bb
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i64 5, label %sw.bb1
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], !prof !0
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; CHECK: BB#0: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}75.29%) BB#4({{[0-9a-fx/= ]+}}24.71%)
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; CHECK: BB#4: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}47.62%) BB#5({{[0-9a-fx/= ]+}}52.38%)
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; CHECK: BB#5: derived from LLVM BB %entry
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; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%)
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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return:
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%retval.0 = phi i32 [ 5, %sw.bb1 ], [ 1, %sw.bb ], [ 0, %entry ]
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ret i32 %retval.0
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}
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!0 = !{!"branch_weights", i32 7, i32 6, i32 4, i32 4, i32 64}
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declare void @g(i32)
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define void @left_leaning_weight_balanced_tree(i32 %x) {
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entry:
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switch i32 %x, label %return [
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i32 0, label %bb0
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i32 10, label %bb1
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i32 20, label %bb2
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i32 30, label %bb3
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i32 40, label %bb4
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i32 50, label %bb5
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], !prof !1
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bb0: tail call void @g(i32 0) br label %return
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bb1: tail call void @g(i32 1) br label %return
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bb2: tail call void @g(i32 2) br label %return
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bb3: tail call void @g(i32 3) br label %return
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bb4: tail call void @g(i32 4) br label %return
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bb5: tail call void @g(i32 5) br label %return
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return: ret void
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; Check that we set branch weights on the pivot cmp instruction correctly.
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; Cases {0,10,20,30} go on the left with weight 13; cases {40,50} go on the
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; right with weight 20.
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;
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; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree:
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; CHECK: BB#0: derived from LLVM BB %entry
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; CHECK-NOT: Successors
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; CHECK: Successors according to CFG: BB#8({{[0-9a-fx/= ]+}}39.71%) BB#9({{[0-9a-fx/= ]+}}60.29%)
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}
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!1 = !{!"branch_weights",
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; Default:
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i32 1,
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; Case 0, 10, 20:
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i32 10, i32 1, i32 1,
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; Case 30, 40, 50:
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i32 1, i32 10, i32 10}
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