Sanjay Patel c26502f012 [InstCombine] fix demanded-bits propagation for zext/trunc ... I was comparing the demanded-bits implementations between InstCombine and TargetLowering as part of investigating questions in D42088 and noticed that this was wrong in IR. We were losing all of the prior known bits when we got back to the 'zext'. llvm-svn: 322662		2018-01-17 14:39:28 +00:00
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Coroutines	Make internal/private GVs implicitly dso_local.	2018-01-11 22:15:05 +00:00
Hello
InstCombine	[InstCombine] fix demanded-bits propagation for zext/trunc	2018-01-17 14:39:28 +00:00
Instrumentation	[hwasan] Rename sized load/store callbacks to be consistent with ASan.	2018-01-16 23:15:08 +00:00
IPO	Make internal/private GVs implicitly dso_local.	2018-01-11 22:15:05 +00:00
ObjCARC	Remove redundant includes from lib/Transforms.	2017-12-13 21:31:01 +00:00
Scalar	[AMDGPU] add LDS f32 intrinsics	2018-01-17 14:05:05 +00:00
Utils	[JumpThreading] Preservation of DT and LVI across the pass	2018-01-12 21:06:48 +00:00
Vectorize	[SLP] Fix for PR32164: Improve vectorization of reverse order of extract operations.	2018-01-16 18:17:01 +00:00
CMakeLists.txt
LLVMBuild.txt