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https://github.com/RPCS3/llvm-mirror.git
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b378d94cb6
This patch implements the set boolean condition instructions introduced in POWER10. The set boolean condition instructions (set[n]bc[r]) are used during the following situations: - sign/zero/any extending i1 to an i32 or i64, - reg+reg, reg+imm or floating point comparisons being sign/zero extended to i32 or i64, - spilling CR bits (using the setnbc instruction) Differential Revision: https://reviews.llvm.org/D87705
404 lines
10 KiB
LLVM
404 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
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; RUN: --check-prefixes=CHECK,CHECK-LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
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; RUN: --check-prefixes=CHECK,CHECK-BE
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; This file does not contain many test cases involving comparisons and logical
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; comparisons (cmplwi, cmpldi). This is because alternative code is generated
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; when there is a compare (logical or not), followed by a sign or zero extend.
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; This codegen will be re-evaluated at a later time on whether or not it should
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; be emitted on P10.
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@globalVal = common local_unnamed_addr global i8 0, align 1
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@globalVal2 = common local_unnamed_addr global i32 0, align 4
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@globalVal3 = common local_unnamed_addr global i64 0, align 8
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@globalVal4 = common local_unnamed_addr global i16 0, align 2
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define signext i32 @setnbcr1(i8 %a) {
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; CHECK-LABEL: setnbcr1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi. r3, r3, 255
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i32 @setnbcr2(i32 %a) {
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; CHECK-LABEL: setnbcr2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpwi r3, 0
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i32 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i32 @setnbcr3(i64 %a) {
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; CHECK-LABEL: setnbcr3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpdi r3, 0
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i64 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i32 @setnbcr4(i16 %a) {
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; CHECK-LABEL: setnbcr4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi. r3, r3, 65535
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i16 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i64 @setnbcr5(i8 %a) {
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; CHECK-LABEL: setnbcr5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi. r3, r3, 255
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setnbcr6(i32 %a) {
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; CHECK-LABEL: setnbcr6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpwi r3, 0
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i32 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setnbcr7(i64 %a) {
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; CHECK-LABEL: setnbcr7:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpdi r3, 0
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i64 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setnbcr8(i16 %a) {
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; CHECK-LABEL: setnbcr8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andi. r3, r3, 65535
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i16 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define void @setnbcr9(i8 %a) {
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; CHECK-LE-LABEL: setnbcr9:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: andi. r3, r3, 255
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr9:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
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; CHECK-BE-NEXT: andi. r3, r3, 255
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
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; CHECK-BE-NEXT: stb r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 1
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%conv1 = sext i1 %cmp to i8
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store i8 %conv1, i8* @globalVal, align 1
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ret void
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}
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define void @setnbcr10(i32 %a) {
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; CHECK-LE-LABEL: setnbcr10:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cmpwi r3, 0
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr10:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha
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; CHECK-BE-NEXT: cmpwi r3, 0
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; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4)
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: stw r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp uge i32 %a, 1
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%conv1 = sext i1 %cmp to i32
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store i32 %conv1, i32* @globalVal2, align 4
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ret void
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}
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define void @setnbcr11(i64 %a) {
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; CHECK-LE-LABEL: setnbcr11:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cmpdi r3, 0
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr11:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha
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; CHECK-BE-NEXT: cmpdi r3, 0
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; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4)
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: std r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp uge i64 %a, 1
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%conv1 = sext i1 %cmp to i64
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store i64 %conv1, i64* @globalVal3, align 8
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ret void
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}
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define void @setnbcr12(i16 %a) {
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; CHECK-LE-LABEL: setnbcr12:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: andi. r3, r3, 65535
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr12:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha
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; CHECK-BE-NEXT: andi. r3, r3, 65535
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4)
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; CHECK-BE-NEXT: sth r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp uge i16 %a, 1
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%conv1 = sext i1 %cmp to i16
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store i16 %conv1, i16* @globalVal4, align 2
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ret void
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}
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define signext i32 @setnbcr13(i8 %a) {
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; CHECK-LABEL: setnbcr13:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 24
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i8 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i32 @setnbcr14(i32 %a) {
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; CHECK-LABEL: setnbcr14:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i32 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i32 @setnbcr15(i64 %a) {
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; CHECK-LABEL: setnbcr15:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpdi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i64 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i32 @setnbcr16(i16 %a) {
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; CHECK-LABEL: setnbcr16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 16
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i16 %a, 1
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%conv = sext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i64 @setnbcr17(i8 %a) {
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; CHECK-LABEL: setnbcr17:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 24
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i8 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setnbcr18(i32 %a) {
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; CHECK-LABEL: setnbcr18:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i32 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setnbcr19(i64 %a) {
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; CHECK-LABEL: setnbcr19:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpdi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i64 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setnbcr20(i16 %a) {
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; CHECK-LABEL: setnbcr20:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 16
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setnbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i16 %a, 1
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%conv = sext i1 %cmp to i64
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ret i64 %conv
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}
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define void @setnbcr21(i8 %a) {
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; CHECK-LE-LABEL: setnbcr21:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: clrlwi r3, r3, 24
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; CHECK-LE-NEXT: cmpwi r3, 1
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr21:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
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; CHECK-BE-NEXT: clrlwi r3, r3, 24
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; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
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; CHECK-BE-NEXT: cmpwi r3, 1
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: stb r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i8 %a, 1
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%conv1 = sext i1 %cmp to i8
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store i8 %conv1, i8* @globalVal, align 1
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ret void
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}
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define void @setnbcr22(i32 %a) {
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; CHECK-LE-LABEL: setnbcr22:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cmpwi r3, 1
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr22:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC1@toc@ha
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; CHECK-BE-NEXT: cmpwi r3, 1
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; CHECK-BE-NEXT: ld r4, .LC1@toc@l(r4)
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: stw r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i32 %a, 1
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%conv1 = sext i1 %cmp to i32
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store i32 %conv1, i32* @globalVal2, align 4
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ret void
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}
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define void @setnbcr23(i64 %a) {
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; CHECK-LE-LABEL: setnbcr23:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cmpdi r3, 1
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr23:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC2@toc@ha
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; CHECK-BE-NEXT: cmpdi r3, 1
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; CHECK-BE-NEXT: ld r4, .LC2@toc@l(r4)
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: std r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i64 %a, 1
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%conv1 = sext i1 %cmp to i64
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store i64 %conv1, i64* @globalVal3, align 8
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ret void
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}
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define void @setnbcr24(i16 %a) {
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; CHECK-LE-LABEL: setnbcr24:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: clrlwi r3, r3, 16
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; CHECK-LE-NEXT: cmpwi r3, 1
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; CHECK-LE-NEXT: setnbcr r3, eq
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; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setnbcr24:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r4, r2, .LC3@toc@ha
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; CHECK-BE-NEXT: clrlwi r3, r3, 16
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; CHECK-BE-NEXT: ld r4, .LC3@toc@l(r4)
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; CHECK-BE-NEXT: cmpwi r3, 1
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; CHECK-BE-NEXT: setnbcr r3, eq
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; CHECK-BE-NEXT: sth r3, 0(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i16 %a, 1
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%conv1 = sext i1 %cmp to i16
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store i16 %conv1, i16* @globalVal4, align 2
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ret void
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}
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