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3f23d4b8c3
tryLatency compares two sched candidates. For the top zone it prefers the one with lesser depth, but only if that depth is greater than the total latency of the instructions we've already scheduled -- otherwise its latency would be hidden and there would be no stall. Unfortunately it only tests the depth of one of the candidates. This can lead to situations where the TopDepthReduce heuristic does not kick in, but a lower priority heuristic chooses the other candidate, whose depth *is* greater than the already scheduled latency, which causes a stall. The fix is to apply the heuristic if the depth of *either* candidate is greater than the already scheduled latency. All this also applies to the BotHeightReduce heuristic in the bottom zone. Differential Revision: https://reviews.llvm.org/D72392
91 lines
3.0 KiB
LLVM
91 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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define hidden void @julia_tryparse_internal_45896() #0 {
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; CHECK-LABEL: julia_tryparse_internal_45896:
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; CHECK: # %bb.0: # %top
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; CHECK-NEXT: ld r3, 0(r3)
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; CHECK-NEXT: cmpldi r3, 0
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; CHECK-NEXT: beq cr0, .LBB0_3
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; CHECK-NEXT: # %bb.1: # %top
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; CHECK-NEXT: cmpldi r3, 10
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; CHECK-NEXT: beq cr0, .LBB0_4
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; CHECK-NEXT: # %bb.2: # %top
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; CHECK-NEXT: .LBB0_3: # %fail194
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; CHECK-NEXT: .LBB0_4: # %L294
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; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_6
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; CHECK-NEXT: # %bb.5: # %L294
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; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_7
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; CHECK-NEXT: .LBB0_6: # %L1057.preheader
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; CHECK-NEXT: .LBB0_7: # %L670
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; CHECK-NEXT: lis r5, 4095
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; CHECK-NEXT: cmpdi r3, 0
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; CHECK-NEXT: sradi r4, r3, 63
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; CHECK-NEXT: ori r5, r5, 65533
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; CHECK-NEXT: crnot 4*cr5+gt, eq
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; CHECK-NEXT: sldi r5, r5, 4
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; CHECK-NEXT: mulhdu r3, r3, r5
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; CHECK-NEXT: maddld r6, r4, r5, r3
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; CHECK-NEXT: cmpld r6, r3
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; CHECK-NEXT: mulld r3, r4, r5
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; CHECK-NEXT: cmpldi cr1, r3, 0
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; CHECK-NEXT: crandc 4*cr5+lt, lt, 4*cr1+eq
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; CHECK-NEXT: mulhdu. r3, r4, r5
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; CHECK-NEXT: bc 4, 4*cr5+gt, .LBB0_10
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; CHECK-NEXT: # %bb.8: # %L670
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; CHECK-NEXT: crorc 4*cr5+lt, 4*cr5+lt, eq
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; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_10
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; CHECK-NEXT: # %bb.9: # %L917
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; CHECK-NEXT: .LBB0_10: # %L994
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top:
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%0 = load i64, i64* undef, align 8
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%1 = icmp ne i64 %0, 0
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%2 = sext i64 %0 to i128
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switch i64 %0, label %pass195 [
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i64 10, label %L294
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i64 16, label %L294.fold.split
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i64 0, label %fail194
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]
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L294.fold.split: ; preds = %top
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unreachable
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L294: ; preds = %top
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%3 = add nsw i32 0, -48
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%4 = zext i32 %3 to i128
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%5 = add i128 %4, 0
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switch i32 undef, label %L670 [
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i32 -1031471104, label %L1057.preheader
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i32 536870912, label %L1057.preheader
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]
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L670: ; preds = %L294
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br label %L898
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L1057.preheader: ; preds = %L294, %L294
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unreachable
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L898: ; preds = %L670
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%umul = call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %2, i128 %5)
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%umul.ov = extractvalue { i128, i1 } %umul, 1
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%value_phi102 = and i1 %1, %umul.ov
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%6 = or i1 %value_phi102, false
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br i1 %6, label %L917, label %L994
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L917: ; preds = %L898
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unreachable
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L994: ; preds = %L898
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unreachable
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fail194: ; preds = %top
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unreachable
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pass195: ; preds = %top
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unreachable
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}
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; Function Attrs: nounwind readnone speculatable willreturn
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declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1
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