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c660bfe147
llvm-mirror/test/CodeGen
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Matt Arsenault c660bfe147 AMDGPU: Fold fneg into fmul_legacy 
llvm-svn: 291784
2017-01-12 18:26:30 +00:00
..
AArch64 Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
AMDGPU AMDGPU: Fold fneg into fmul_legacy 2017-01-12 18:26:30 +00:00
ARM Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
AVR [AVR] Implement TargetLoweing::getRegisterByName 2017-01-07 23:39:47 +00:00
BPF
Generic PR 31534: When emitting both DWARF unwind tables and debug information, 2017-01-05 20:55:28 +00:00
Hexagon
Inputs
Lanai
Mips Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
MIR [AArch64] Fold some filled/spilled subreg COPYs 2017-01-05 21:51:42 +00:00
MSP430
NVPTX [TM] Restore default TargetOptions in TargetMachine::resetTargetOptions. 2017-01-10 23:43:04 +00:00
PowerPC Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
SPARC Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
SystemZ Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
Thumb Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
Thumb2 Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
WebAssembly Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
WinEH
X86 [AVX-512] Improve lowering of zero_extend of v4i1 to v4i32 and v2i1 to v2i64 with VLX, but no DQ or BW support. 2017-01-12 06:49:12 +00:00
XCore