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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-31 07:52:55 +01:00
llvm-mirror/test/CodeGen
Hal Finkel c21c3cf09e Add the PPC64 popcntd instruction
PPC ISA 2.06 (P7, A2, etc.) has a popcntd instruction. Add this instruction and
tell TTI about it so that popcount-loop recognition will know about it.

llvm-svn: 178233
2013-03-28 13:29:47 +00:00
..
AArch64 Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings 2013-03-26 18:56:54 +00:00
ARM Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
CPP
Generic XFAIL some of the generic CodeGen tests for Hexagon. 2013-03-25 21:04:16 +00:00
Hexagon Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth. 2013-03-26 15:43:57 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze
Mips
MSP430
NVPTX [NVPTX] Fix handling of vector arguments 2013-03-24 21:17:47 +00:00
PowerPC Add the PPC64 popcntd instruction 2013-03-28 13:29:47 +00:00
R600 R600/SI: add SETO/SETUO patterns 2013-03-27 15:27:31 +00:00
SI
SPARC
Thumb Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
Thumb2
X86 Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
XCore