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- Save/restore only registers that are used. This includes Callee saved registers and Caller saved registers (arguments and temporaries) for integer and FP registers. - If there is a call in the interrupt handler, save/restore all Caller saved registers (arguments and temporaries) and all FP registers. - Emit special return instructions depending on "interrupt" attribute type. Based on initial patch by Zhaoshi Zheng. Reviewers: asb Reviewed By: asb Subscribers: rkruppe, the_o, MartinMosbeck, brucehoult, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, llvm-commits Differential Revision: https://reviews.llvm.org/D48411 llvm-svn: 338047
58 lines
2.0 KiB
TableGen
58 lines
2.0 KiB
TableGen
//===-- RISCVCallingConv.td - Calling Conventions RISCV ----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This describes the calling conventions for the RISCV architecture.
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//
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//===----------------------------------------------------------------------===//
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// The RISC-V calling convention is handled with custom code in
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// RISCVISelLowering.cpp (CC_RISCV).
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def CSR : CalleeSavedRegs<(add X1, X3, X4, X8, X9, (sequence "X%u", 18, 27))>;
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// Needed for implementation of RISCVRegisterInfo::getNoPreservedMask()
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def CSR_NoRegs : CalleeSavedRegs<(add)>;
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// Interrupt handler needs to save/restore all registers that are used,
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// both Caller and Callee saved registers.
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def CSR_Interrupt : CalleeSavedRegs<(add X1,
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(sequence "X%u", 3, 9),
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(sequence "X%u", 10, 11),
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(sequence "X%u", 12, 17),
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(sequence "X%u", 18, 27),
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(sequence "X%u", 28, 31))>;
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// Same as CSR_Interrupt, but including all 32-bit FP registers.
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def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add X1,
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(sequence "X%u", 3, 9),
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(sequence "X%u", 10, 11),
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(sequence "X%u", 12, 17),
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(sequence "X%u", 18, 27),
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(sequence "X%u", 28, 31),
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(sequence "F%u_32", 0, 7),
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(sequence "F%u_32", 10, 11),
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(sequence "F%u_32", 12, 17),
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(sequence "F%u_32", 28, 31),
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(sequence "F%u_32", 8, 9),
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(sequence "F%u_32", 18, 27))>;
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// Same as CSR_Interrupt, but including all 64-bit FP registers.
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def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add X1,
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(sequence "X%u", 3, 9),
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(sequence "X%u", 10, 11),
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(sequence "X%u", 12, 17),
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(sequence "X%u", 18, 27),
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(sequence "X%u", 28, 31),
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(sequence "F%u_64", 0, 7),
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(sequence "F%u_64", 10, 11),
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(sequence "F%u_64", 12, 17),
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(sequence "F%u_64", 28, 31),
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(sequence "F%u_64", 8, 9),
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(sequence "F%u_64", 18, 27))>;
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