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An encoding does not allow to use SDWA in an instruction with scalar operands, either literals or SGPRs. That is however possible to copy these operands into a VGPR first. Several copies of the value are produced if multiple SDWA conversions were done. To cleanup MachineLICM (to hoist copies out of loops), MachineCSE (to remove duplicate copies) and SIFoldOperands (to replace SGPR to VGPR copy with immediate copy right to the VGPR) runs are added after the SDWA pass. Differential Revision: https://reviews.llvm.org/D33583 llvm-svn: 304219
237 lines
8.2 KiB
LLVM
237 lines
8.2 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare i64 @llvm.amdgcn.fcmp.f32(float, float, i32) #0
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declare i64 @llvm.amdgcn.fcmp.f64(double, double, i32) #0
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declare float @llvm.fabs.f32(float) #0
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; GCN-LABEL: {{^}}v_fcmp_f32_dynamic_cc:
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; GCN: s_endpgm
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define amdgpu_kernel void @v_fcmp_f32_dynamic_cc(i64 addrspace(1)* %out, float %src0, float %src1, i32 %cc) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src0, float %src1, i32 %cc)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_oeq_with_fabs:
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; GCN: v_cmp_eq_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}, |{{v[0-9]+}}|
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define amdgpu_kernel void @v_fcmp_f32_oeq_with_fabs(i64 addrspace(1)* %out, float %src, float %a) {
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%temp = call float @llvm.fabs.f32(float %a)
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float %temp, i32 1)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_oeq_both_operands_with_fabs:
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; GCN: v_cmp_eq_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, |{{s[0-9]+}}|, |{{v[0-9]+}}|
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define amdgpu_kernel void @v_fcmp_f32_oeq_both_operands_with_fabs(i64 addrspace(1)* %out, float %src, float %a) {
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%temp = call float @llvm.fabs.f32(float %a)
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%src_input = call float @llvm.fabs.f32(float %src)
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src_input, float %temp, i32 1)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp:
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; GCN-NOT: v_cmp_eq_f32_e64
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define amdgpu_kernel void @v_fcmp(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 -1)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_oeq:
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; GCN: v_cmp_eq_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_oeq(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 1)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_one:
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; GCN: v_cmp_neq_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_one(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 6)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_ogt:
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; GCN: v_cmp_gt_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_ogt(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 2)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_oge:
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; GCN: v_cmp_ge_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_oge(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 3)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_olt:
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; GCN: v_cmp_lt_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_olt(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 4)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_ole:
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; GCN: v_cmp_le_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_ole(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 5)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_ueq:
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; GCN: v_cmp_nlg_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_ueq(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 9)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_une:
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; GCN: v_cmp_neq_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_une(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 14)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_ugt:
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; GCN: v_cmp_nle_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_ugt(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 10)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_uge:
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; GCN: v_cmp_nlt_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_uge(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 11)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_ult:
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; GCN: v_cmp_nge_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_ult(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 12)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f32_ule:
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; GCN: v_cmp_ngt_f32_e64
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define amdgpu_kernel void @v_fcmp_f32_ule(i64 addrspace(1)* %out, float %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 13)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_oeq:
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; GCN: v_cmp_eq_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_oeq(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 1)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_one:
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; GCN: v_cmp_neq_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_one(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 6)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_ogt:
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; GCN: v_cmp_gt_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_ogt(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 2)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_oge:
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; GCN: v_cmp_ge_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_oge(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 3)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_olt:
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; GCN: v_cmp_lt_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_olt(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 4)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_ole:
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; GCN: v_cmp_le_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_ole(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 5)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_ueq:
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; GCN: v_cmp_nlg_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_ueq(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 9)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_une:
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; GCN: v_cmp_neq_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_une(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 14)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_ugt:
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; GCN: v_cmp_nle_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_ugt(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 10)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_uge:
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; GCN: v_cmp_nlt_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_uge(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 11)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_ult:
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; GCN: v_cmp_nge_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_ult(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 12)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_fcmp_f64_ule:
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; GCN: v_cmp_ngt_f64_e64
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define amdgpu_kernel void @v_fcmp_f64_ule(i64 addrspace(1)* %out, double %src) {
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%result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 13)
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind readnone convergent }
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