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llvm-mirror/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
Matthias Braun 46d58287e3 MIParser/MIRPrinter: Compute block successors if not explicitely specified
- MIParser: If the successor list is not specified successors will be
  added based on basic block operands in the block and possible
  fallthrough.

- MIRPrinter: Adds a new `simplify-mir` option, with that option set:
  Skip printing of block successor lists in cases where the
  parser is guaranteed to reconstruct it. This means we still print the
  list if some successor cannot be determined (happens for example for
  jump tables), if the successor order changes or branch probabilities
  being unequal.

Differential Revision: https://reviews.llvm.org/D31262

llvm-svn: 302289
2017-05-05 21:09:30 +00:00

41 lines
1.0 KiB
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# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies %s -o - | FileCheck %s -check-prefixes=GCN
--- |
define amdgpu_kernel void @phi_visit_order() { ret void }
name: phi_visit_order
tracksRegLiveness: true
registers:
- { id: 0, class: sreg_32_xm0 }
- { id: 1, class: sreg_64 }
- { id: 2, class: sreg_32_xm0 }
- { id: 7, class: vgpr_32 }
- { id: 8, class: sreg_32_xm0 }
- { id: 9, class: vgpr_32 }
- { id: 10, class: sreg_64 }
- { id: 11, class: sreg_32_xm0 }
body: |
; GCN-LABEL: name: phi_visit_order
; GCN: V_ADD_I32
bb.0:
liveins: %vgpr0
%7 = COPY %vgpr0
%8 = S_MOV_B32 0
bb.1:
%0 = PHI %8, %bb.0, %0, %bb.1, %2, %bb.2
%9 = V_MOV_B32_e32 9, implicit %exec
%10 = V_CMP_EQ_U32_e64 %7, %9, implicit %exec
%1 = SI_IF %10, %bb.2, implicit-def %exec, implicit-def %scc, implicit %exec
S_BRANCH %bb.1
bb.2:
SI_END_CF %1, implicit-def %exec, implicit-def %scc, implicit %exec
%11 = S_MOV_B32 1
%2 = S_ADD_I32 %0, %11, implicit-def %scc
S_BRANCH %bb.1
...
---