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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 05:23:45 +02:00
llvm-mirror/test/CodeGen
Renato Golin c777279486 Making rem_crash.ll target-specific
This test failed in some ARM bots after a divmod change because it was
running on a native llc, instead of targeted one. This makes sure the test
is target-specific (as intended), and also copies to ARM and AArch64
directories. If it is also supposed to work on other architectures, I'll
leave as an exercise to the respective maintainers.

llvm-svn: 262620
2016-03-03 14:01:10 +00:00
..
AArch64 Making rem_crash.ll target-specific 2016-03-03 14:01:10 +00:00
AMDGPU DAGCombiner: Make sure an integer is being truncated 2016-03-02 01:36:51 +00:00
ARM Making rem_crash.ll target-specific 2016-03-03 14:01:10 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips Revert "[mips] Promote the result of SETCC nodes to GPR width." 2016-03-01 20:25:43 +00:00
MIR
MSP430
NVPTX [NVPTX] Use different, convergent MIs for convergent calls. 2016-03-01 19:24:03 +00:00
PowerPC [PPCVSXFMAMutate] Temporarily disable this pass 2016-03-03 01:27:35 +00:00
SPARC
SystemZ
Thumb
Thumb2 ARM: Introduce conservative load/store optimization mode 2016-03-02 19:20:00 +00:00
WebAssembly
WinEH [WinEH] Make setjmp work correctly with EH 2016-02-29 19:16:03 +00:00
X86 Making rem_crash.ll target-specific 2016-03-03 14:01:10 +00:00
XCore