mirror of
https://github.com/RPCS3/llvm-mirror.git
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2f44405590
Introduce three pseudo instructions to be used during DAG ISel to represent v8.1-m low-overhead loops. One maps to set_loop_iterations while loop_decrement_reg is lowered to two, so that we can separate the decrement and branching operations. The pseudo instructions are expanded pre-emission, where we can still decide whether we actually want to generate a low-overhead loop, in a new pass: ARMLowOverheadLoops. The pass currently bails, reverting to an sub, icmp and br, in the cases where a call or stack spill/restore happens between the decrement and branching instructions, or if the loop is too large. Differential Revision: https://reviews.llvm.org/D63476 llvm-svn: 364288
68 lines
1.9 KiB
CMake
68 lines
1.9 KiB
CMake
set(LLVM_TARGET_DEFINITIONS ARM.td)
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tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
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tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
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tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
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tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM ARMGenSystemRegister.inc -gen-searchable-tables)
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add_public_tablegen_target(ARMCommonTableGen)
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add_llvm_target(ARMCodeGen
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A15SDOptimizer.cpp
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ARMAsmPrinter.cpp
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ARMBaseInstrInfo.cpp
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ARMBaseRegisterInfo.cpp
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ARMBasicBlockInfo.cpp
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ARMCallingConv.cpp
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ARMCallLowering.cpp
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ARMCodeGenPrepare.cpp
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ARMConstantIslandPass.cpp
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ARMConstantPoolValue.cpp
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ARMExpandPseudoInsts.cpp
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ARMFastISel.cpp
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ARMFrameLowering.cpp
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ARMHazardRecognizer.cpp
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ARMInstructionSelector.cpp
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ARMISelDAGToDAG.cpp
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ARMISelLowering.cpp
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ARMInstrInfo.cpp
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ARMLegalizerInfo.cpp
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ARMParallelDSP.cpp
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ARMLoadStoreOptimizer.cpp
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ARMLowOverheadLoops.cpp
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ARMMCInstLower.cpp
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ARMMachineFunctionInfo.cpp
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ARMMacroFusion.cpp
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ARMRegisterInfo.cpp
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ARMOptimizeBarriersPass.cpp
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ARMRegisterBankInfo.cpp
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ARMSelectionDAGInfo.cpp
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ARMSubtarget.cpp
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ARMTargetMachine.cpp
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ARMTargetObjectFile.cpp
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ARMTargetTransformInfo.cpp
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MLxExpansionPass.cpp
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Thumb1FrameLowering.cpp
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Thumb1InstrInfo.cpp
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ThumbRegisterInfo.cpp
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Thumb2ITBlockPass.cpp
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Thumb2InstrInfo.cpp
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Thumb2SizeReduction.cpp
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)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(TargetInfo)
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add_subdirectory(Utils)
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