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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/include/llvm/Target
Jim Grosbach c813cf9649 Adjust the scavenge register spilling to allow the target to choose an
appropriate restore location for the spill as well as perform the actual
save and restore.

The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.

llvm-svn: 84554
2009-10-19 22:27:30 +00:00
..
SubtargetFeature.h Switch SubtargetFeature off of ostreams 2009-08-23 21:41:43 +00:00
Target.td Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When 2009-10-01 08:21:18 +00:00
TargetAsmParser.h Added the ParseInstruction() hook for target specific assembler directives so 2009-09-10 20:51:44 +00:00
TargetCallingConv.td Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64). 2009-08-03 08:13:56 +00:00
TargetData.h Try again at privatizing the layout info map, with a rewritten patch. 2009-08-21 19:59:12 +00:00
TargetELFWriterInfo.h - Remove custom handling of jumptables by the elf writter (this was 2009-08-05 06:57:03 +00:00
TargetFrameInfo.h Use explicit structs instead of std::pair to map callee saved regs to spill slots. 2009-09-27 17:58:47 +00:00
TargetInstrDesc.h Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When 2009-10-01 08:21:18 +00:00
TargetInstrInfo.h Revert the kludge in 76703. I got a clean 2009-10-12 18:49:00 +00:00
TargetInstrItineraries.h Make the end-of-itinerary mark explicit. Some cleanup. 2009-09-24 20:22:50 +00:00
TargetIntrinsicInfo.h Clean up TargetIntrinsicInfo API. Add pure virtual methods. 2009-10-15 18:49:26 +00:00
TargetJITInfo.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
TargetLowering.h Update comments. 2009-09-19 10:08:51 +00:00
TargetLoweringObjectFile.h Use OutStreamer.SwitchSection instead of writing out textual section directives. 2009-09-30 22:25:37 +00:00
TargetMachine.h Add a CodeGenOpt::Less level to match -O1. It'll be used by clients which do not want post-regalloc scheduling. 2009-10-16 21:02:20 +00:00
TargetMachOWriterInfo.h Don't attribute in file headers anymore. See llvmdev for the 2007-12-29 19:59:42 +00:00
TargetOptions.h Implement the JIT side of the GDB JIT debugging interface. To enable this 2009-09-20 23:52:43 +00:00
TargetRegisterInfo.h Adjust the scavenge register spilling to allow the target to choose an 2009-10-19 22:27:30 +00:00
TargetRegistry.h remove a dead method. 2009-09-20 22:46:42 +00:00
TargetSchedule.td Fix apostrophos. 2009-09-15 15:08:33 +00:00
TargetSelect.h Add llvm::InitializeAllTargetInfos and llvm::InitializeAllAsmParsers. 2009-07-17 22:35:35 +00:00
TargetSelectionDAG.td Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type. 2009-08-12 22:30:59 +00:00
TargetSubtarget.h Change createPostRAScheduler so it can be turned off at llc -O1. 2009-10-16 21:06:15 +00:00