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c38a4eb7d4
This patch makes LSR generate better code for SystemZ in the cases of memory intrinsics, Load->Store pairs or comparison of immediate with memory. In order to achieve this, the following common code changes were made: * New TTI hook: LSRWithInstrQueries(), which defaults to false. Controls if LSR should do instruction-based addressing evaluations by calling isLegalAddressingMode() with the Instruction pointers. * In LoopStrengthReduce: handle address operands of memset, memmove and memcpy as address uses, and call isFoldableMemAccessOffset() for any LSRUse::Address, not just loads or stores. SystemZ changes: * isLSRCostLess() implemented with Insns first, and without ImmCost. * New function supportedAddressingMode() that is a helper for TTI methods looking at Instructions passed via pointers. Review: Ulrich Weigand, Quentin Colombet https://reviews.llvm.org/D35262 https://reviews.llvm.org/D35049 llvm-svn: 308729
99 lines
3.6 KiB
C++
99 lines
3.6 KiB
C++
//===-- SystemZTargetTransformInfo.h - SystemZ-specific TTI ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H
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#include "SystemZTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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namespace llvm {
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class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
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typedef BasicTTIImplBase<SystemZTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const SystemZSubtarget *ST;
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const SystemZTargetLowering *TLI;
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const SystemZSubtarget *getST() const { return ST; }
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const SystemZTargetLowering *getTLI() const { return TLI; }
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unsigned const LIBCALL_COST = 30;
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public:
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explicit SystemZTTIImpl(const SystemZTargetMachine *TM, const Function &F)
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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/// \name Scalar TTI Implementations
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/// @{
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int getIntImmCost(const APInt &Imm, Type *Ty);
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int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
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int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty);
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::UnrollingPreferences &UP);
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bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
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TargetTransformInfo::LSRCost &C2);
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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unsigned getNumberOfRegisters(bool Vector);
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unsigned getRegisterBitWidth(bool Vector) const;
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unsigned getCacheLineSize() { return 256; }
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unsigned getPrefetchDistance() { return 2000; }
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unsigned getMinPrefetchStride() { return 2048; }
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bool prefersVectorizedAddressing() { return false; }
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bool LSRWithInstrQueries() { return true; }
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bool supportsEfficientVectorElementLoadStore() { return true; }
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bool enableInterleavedAccessVectorization() { return true; }
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int getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>());
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int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
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unsigned getVectorTruncCost(Type *SrcTy, Type *DstTy);
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unsigned getVectorBitmaskConversionCost(Type *SrcTy, Type *DstTy);
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int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
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const Instruction *I = nullptr);
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int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
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const Instruction *I = nullptr);
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int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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unsigned AddressSpace, const Instruction *I = nullptr);
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int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
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unsigned Factor,
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ArrayRef<unsigned> Indices,
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unsigned Alignment,
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unsigned AddressSpace);
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/// @}
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};
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} // end namespace llvm
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#endif
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