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llvm-mirror/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
Stanislav Mekhanoshin a2f5f5f7c9 [AMDGPU] Add infer address spaces pass before SROA
It adds it for the target after inlining but before SROA where
we can get most out of it.

Differential Revision: https://reviews.llvm.org/D34366

llvm-svn: 305759
2017-06-19 23:17:36 +00:00

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LLVM

; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
; GCN: Function Integration/Inlining
; GCN: FunctionPass Manager
; GCN: Infer address spaces
; GCN: SROA
define void @empty() {
ret void
}