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d49cb60862
Summary: This catches malformed mir files which specify alignment as log2 instead of pow2. See https://reviews.llvm.org/D65945 for reference, This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67433 llvm-svn: 371608
49 lines
1.5 KiB
YAML
49 lines
1.5 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx902 -o - %s -run-pass si-form-memory-clauses -verify-machineinstrs | FileCheck -check-prefix=XNACK %s
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# The SIFormMemoryClauses pass must not form a clause (indicated by BUNDLE)
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# from the two adjacent smem instructions, because the first one has its
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# result coalesced with an operand.
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# XNACK-LABEL: body:
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# XNACK-NOT: BUNDLE
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---
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name: _amdgpu_cs_main
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alignment: 1
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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fixedStack: []
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stack: []
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constants: []
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body: |
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bb.0:
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liveins: $sgpr2, $sgpr3, $sgpr12, $sgpr13, $sgpr14, $vgpr0, $vgpr1
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%0:vgpr_32 = COPY $vgpr1
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%1:sgpr_32 = COPY $sgpr12
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%2:sgpr_32 = COPY $sgpr3
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undef %3.sub0:sgpr_128 = COPY $sgpr2
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%4:vgpr_32 = COPY $vgpr0
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%5:sgpr_32 = COPY $sgpr14
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%6:sgpr_32 = COPY $sgpr13
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%7:sreg_64_xexec = S_GETPC_B64
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%7.sub0:sreg_64_xexec = COPY %1
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%3.sub1:sgpr_128 = S_AND_B32 %2, 65535, implicit-def dead $scc
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%3.sub3:sgpr_128 = S_MOV_B32 151468
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%3.sub2:sgpr_128 = S_MOV_B32 -1
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%7.sub0:sreg_64_xexec = S_LOAD_DWORD_IMM %7, 48, 0, 0 :: (load 4 from `i8 addrspace(4)* undef`, addrspace 4)
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%8:sreg_64_xexec = S_BUFFER_LOAD_DWORDX2_IMM %3, 640, 0, 0 :: (dereferenceable invariant load 8)
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undef %9.sub0:vreg_128 = V_LSHL_ADD_U32 %6, 4, %4, implicit $exec
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%9.sub1:vreg_128 = V_LSHL_ADD_U32 %5, 4, %0, implicit $exec
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S_ENDPGM 0
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...
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