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llvm-mirror/test/CodeGen/X86/GlobalISel/legalize-fmul-scalar.mir
Guillaume Chatelet d49cb60862 [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,

This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67433

llvm-svn: 371608
2019-09-11 11:16:48 +00:00

94 lines
2.8 KiB
YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
--- |
define float @test_fmul_float(float %arg1, float %arg2) {
%ret = fmul float %arg1, %arg2
ret float %ret
}
define double @test_fmul_double(double %arg1, double %arg2) {
%ret = fmul double %arg1, %arg2
ret double %ret
}
...
---
name: test_fmul_float
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
- { id: 3, class: _, preferred-register: '' }
- { id: 4, class: _, preferred-register: '' }
- { id: 5, class: _, preferred-register: '' }
liveins:
fixedStack:
stack:
constants:
body: |
bb.1 (%ir-block.0):
liveins: $xmm0, $xmm1
; CHECK-LABEL: name: test_fmul_float
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s128)
; CHECK: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[TRUNC]], [[TRUNC1]]
; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[FMUL]](s32)
; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
; CHECK: RET 0, implicit $xmm0
%2:_(s128) = COPY $xmm0
%0:_(s32) = G_TRUNC %2(s128)
%3:_(s128) = COPY $xmm1
%1:_(s32) = G_TRUNC %3(s128)
%4:_(s32) = G_FMUL %0, %1
%5:_(s128) = G_ANYEXT %4(s32)
$xmm0 = COPY %5(s128)
RET 0, implicit $xmm0
...
---
name: test_fmul_double
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
- { id: 3, class: _, preferred-register: '' }
- { id: 4, class: _, preferred-register: '' }
- { id: 5, class: _, preferred-register: '' }
liveins:
fixedStack:
stack:
constants:
body: |
bb.1 (%ir-block.0):
liveins: $xmm0, $xmm1
; CHECK-LABEL: name: test_fmul_double
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
; CHECK: [[COPY1:%[0-9]+]]:_(s128) = COPY $xmm1
; CHECK: [[TRUNC1:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128)
; CHECK: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[TRUNC]], [[TRUNC1]]
; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[FMUL]](s64)
; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
; CHECK: RET 0, implicit $xmm0
%2:_(s128) = COPY $xmm0
%0:_(s64) = G_TRUNC %2(s128)
%3:_(s128) = COPY $xmm1
%1:_(s64) = G_TRUNC %3(s128)
%4:_(s64) = G_FMUL %0, %1
%5:_(s128) = G_ANYEXT %4(s64)
$xmm0 = COPY %5(s128)
RET 0, implicit $xmm0
...