mirror of
https://github.com/RPCS3/llvm-mirror.git
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1c2f42a2d2
llvm-svn: 371240
123 lines
2.4 KiB
LLVM
123 lines
2.4 KiB
LLVM
; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
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define i8 @test_sdiv8(i8 %dividend, i8 %divisor) nounwind {
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entry:
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%result = sdiv i8 %dividend, %divisor
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ret i8 %result
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}
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; CHECK-LABEL: test_sdiv8:
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; CHECK: movsbl
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; CHECK: idivb
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define i8 @test_srem8(i8 %dividend, i8 %divisor) nounwind {
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entry:
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%result = srem i8 %dividend, %divisor
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ret i8 %result
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}
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; CHECK-LABEL: test_srem8:
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; CHECK: movsbl
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; CHECK: idivb
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define i8 @test_udiv8(i8 %dividend, i8 %divisor) nounwind {
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entry:
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%result = udiv i8 %dividend, %divisor
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ret i8 %result
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}
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; CHECK-LABEL: test_udiv8:
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; CHECK: movzbl
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; CHECK: divb
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define i8 @test_urem8(i8 %dividend, i8 %divisor) nounwind {
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entry:
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%result = urem i8 %dividend, %divisor
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ret i8 %result
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}
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; CHECK-LABEL: test_urem8:
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; CHECK: movzbl
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; CHECK: divb
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define i16 @test_sdiv16(i16 %dividend, i16 %divisor) nounwind {
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entry:
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%result = sdiv i16 %dividend, %divisor
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ret i16 %result
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}
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; CHECK-LABEL: test_sdiv16:
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; CHECK: cwtd
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; CHECK: idivw
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define i16 @test_srem16(i16 %dividend, i16 %divisor) nounwind {
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entry:
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%result = srem i16 %dividend, %divisor
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ret i16 %result
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}
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; CHECK-LABEL: test_srem16:
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; CHECK: cwtd
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; CHECK: idivw
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define i16 @test_udiv16(i16 %dividend, i16 %divisor) nounwind {
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entry:
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%result = udiv i16 %dividend, %divisor
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ret i16 %result
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}
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; CHECK-LABEL: test_udiv16:
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; CHECK: xorl
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; CHECK: divw
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define i16 @test_urem16(i16 %dividend, i16 %divisor) nounwind {
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entry:
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%result = urem i16 %dividend, %divisor
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ret i16 %result
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}
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; CHECK-LABEL: test_urem16:
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; CHECK: xorl
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; CHECK: divw
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define i32 @test_sdiv32(i32 %dividend, i32 %divisor) nounwind {
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entry:
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%result = sdiv i32 %dividend, %divisor
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ret i32 %result
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}
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; CHECK-LABEL: test_sdiv32:
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; CHECK: cltd
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; CHECK: idivl
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define i32 @test_srem32(i32 %dividend, i32 %divisor) nounwind {
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entry:
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%result = srem i32 %dividend, %divisor
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ret i32 %result
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}
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; CHECK-LABEL: test_srem32:
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; CHECK: cltd
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; CHECK: idivl
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define i32 @test_udiv32(i32 %dividend, i32 %divisor) nounwind {
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entry:
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%result = udiv i32 %dividend, %divisor
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ret i32 %result
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}
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; CHECK-LABEL: test_udiv32:
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; CHECK: xorl
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; CHECK: divl
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define i32 @test_urem32(i32 %dividend, i32 %divisor) nounwind {
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entry:
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%result = urem i32 %dividend, %divisor
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ret i32 %result
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}
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; CHECK-LABEL: test_urem32:
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; CHECK: xorl
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; CHECK: divl
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