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e1cb504775
This is an enhancement to D77895 to avoid another round-trip from XMM->GPR->XMM. This time we handle the case of starting/ending with an f64 and casting to signed i32 as the intermediate value. It's a bit more involved than I initially assumed because we need to use target-specific opcodes to represent the non-standard cast ops. Differential Revision: https://reviews.llvm.org/D78362
99 lines
3.0 KiB
LLVM
99 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=CHECK -check-prefix=CHECK64 %s
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; RUN: llc < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck -check-prefix=CHECK -check-prefix=CHECK32 %s
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; PR19059
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define i32 @isint_return(double %d) nounwind {
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; CHECK64-LABEL: isint_return:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: cvttpd2dq %xmm0, %xmm1
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; CHECK64-NEXT: cvtdq2pd %xmm1, %xmm1
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; CHECK64-NEXT: cmpeqsd %xmm0, %xmm1
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; CHECK64-NEXT: movq %xmm1, %rax
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; CHECK64-NEXT: andl $1, %eax
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; CHECK64-NEXT: # kill: def $eax killed $eax killed $rax
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; CHECK64-NEXT: retq
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;
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; CHECK32-LABEL: isint_return:
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; CHECK32: # %bb.0:
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; CHECK32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK32-NEXT: cvttpd2dq %xmm0, %xmm1
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; CHECK32-NEXT: cvtdq2pd %xmm1, %xmm1
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; CHECK32-NEXT: cmpeqsd %xmm0, %xmm1
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; CHECK32-NEXT: movd %xmm1, %eax
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; CHECK32-NEXT: andl $1, %eax
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; CHECK32-NEXT: retl
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%i = fptosi double %d to i32
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%e = sitofp i32 %i to double
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%c = fcmp oeq double %d, %e
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%z = zext i1 %c to i32
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ret i32 %z
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}
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define i32 @isint_float_return(float %f) nounwind {
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; CHECK64-LABEL: isint_float_return:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: cvttps2dq %xmm0, %xmm1
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; CHECK64-NEXT: cvtdq2ps %xmm1, %xmm1
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; CHECK64-NEXT: cmpeqss %xmm0, %xmm1
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; CHECK64-NEXT: movd %xmm1, %eax
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; CHECK64-NEXT: andl $1, %eax
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; CHECK64-NEXT: retq
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;
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; CHECK32-LABEL: isint_float_return:
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; CHECK32: # %bb.0:
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; CHECK32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK32-NEXT: cvttps2dq %xmm0, %xmm1
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; CHECK32-NEXT: cvtdq2ps %xmm1, %xmm1
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; CHECK32-NEXT: cmpeqss %xmm0, %xmm1
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; CHECK32-NEXT: movd %xmm1, %eax
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; CHECK32-NEXT: andl $1, %eax
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; CHECK32-NEXT: retl
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%i = fptosi float %f to i32
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%g = sitofp i32 %i to float
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%c = fcmp oeq float %f, %g
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%z = zext i1 %c to i32
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ret i32 %z
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}
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declare void @foo()
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define void @isint_branch(double %d) nounwind {
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; CHECK64-LABEL: isint_branch:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: cvttpd2dq %xmm0, %xmm1
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; CHECK64-NEXT: cvtdq2pd %xmm1, %xmm1
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; CHECK64-NEXT: ucomisd %xmm1, %xmm0
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; CHECK64-NEXT: jne .LBB2_2
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; CHECK64-NEXT: jp .LBB2_2
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; CHECK64-NEXT: # %bb.1: # %true
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; CHECK64-NEXT: pushq %rax
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; CHECK64-NEXT: callq foo
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; CHECK64-NEXT: popq %rax
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; CHECK64-NEXT: .LBB2_2: # %false
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; CHECK64-NEXT: retq
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;
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; CHECK32-LABEL: isint_branch:
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; CHECK32: # %bb.0:
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; CHECK32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK32-NEXT: cvttpd2dq %xmm0, %xmm1
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; CHECK32-NEXT: cvtdq2pd %xmm1, %xmm1
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; CHECK32-NEXT: ucomisd %xmm1, %xmm0
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; CHECK32-NEXT: jne .LBB2_2
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; CHECK32-NEXT: jp .LBB2_2
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; CHECK32-NEXT: # %bb.1: # %true
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; CHECK32-NEXT: calll foo
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; CHECK32-NEXT: .LBB2_2: # %false
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; CHECK32-NEXT: retl
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%i = fptosi double %d to i32
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%e = sitofp i32 %i to double
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%c = fcmp oeq double %d, %e
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br i1 %c, label %true, label %false
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true:
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call void @foo()
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ret void
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false:
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ret void
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}
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