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1d52f2e8fe
If we lower a v2i64 shuffle to PSHUFD, we currently clamp undef elements to 0, (elements 0,1 of the v4i32) which can result in the shuffle referencing more elements of the source vector than expected, affecting later shuffle combines and KnownBits/SimplifyDemanded calls. By ensuring we widen the undef mask element we allow getV4X86ShuffleImm8 to use inline elements as the default, which are more likely to fold.
77 lines
3.4 KiB
LLVM
77 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
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define { i64, i64 } @PR46189(double %0, double %1, double %2, double %3, double %4) {
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; SSE-LABEL: PR46189:
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; SSE: # %bb.0:
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; SSE-NEXT: movapd %xmm0, %xmm5
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; SSE-NEXT: subsd %xmm2, %xmm5
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; SSE-NEXT: addsd %xmm2, %xmm0
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; SSE-NEXT: unpcklpd {{.*#+}} xmm5 = xmm5[0],xmm0[0]
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; SSE-NEXT: unpcklpd {{.*#+}} xmm3 = xmm3[0,0]
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; SSE-NEXT: divpd %xmm3, %xmm5
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; SSE-NEXT: cvttpd2dq %xmm5, %xmm0
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; SSE-NEXT: movapd %xmm1, %xmm3
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; SSE-NEXT: subsd %xmm2, %xmm3
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; SSE-NEXT: addsd %xmm2, %xmm1
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; SSE-NEXT: unpcklpd {{.*#+}} xmm3 = xmm3[0],xmm1[0]
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; SSE-NEXT: unpcklpd {{.*#+}} xmm4 = xmm4[0,0]
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; SSE-NEXT: divpd %xmm4, %xmm3
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; SSE-NEXT: cvttpd2dq %xmm3, %xmm1
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; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE-NEXT: movq %xmm0, %rax
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
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; SSE-NEXT: movq %xmm0, %rdx
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR46189:
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; AVX: # %bb.0:
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; AVX-NEXT: vsubsd %xmm2, %xmm0, %xmm5
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; AVX-NEXT: vaddsd %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm5[0],xmm0[0]
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; AVX-NEXT: vmovddup {{.*#+}} xmm3 = xmm3[0,0]
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; AVX-NEXT: vdivpd %xmm3, %xmm0, %xmm0
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; AVX-NEXT: vcvttpd2dq %xmm0, %xmm0
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; AVX-NEXT: vsubsd %xmm2, %xmm1, %xmm3
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; AVX-NEXT: vaddsd %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm3[0],xmm1[0]
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; AVX-NEXT: vmovddup {{.*#+}} xmm2 = xmm4[0,0]
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; AVX-NEXT: vdivpd %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vcvttpd2dq %xmm1, %xmm1
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; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; AVX-NEXT: vmovq %xmm0, %rax
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; AVX-NEXT: vpextrq $1, %xmm0, %rdx
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; AVX-NEXT: retq
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%6 = insertelement <2 x double> undef, double %0, i32 0
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%7 = shufflevector <2 x double> %6, <2 x double> undef, <2 x i32> zeroinitializer
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%8 = insertelement <2 x double> undef, double %2, i32 0
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%9 = shufflevector <2 x double> %8, <2 x double> undef, <2 x i32> zeroinitializer
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%10 = fsub <2 x double> %7, %9
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%11 = fadd <2 x double> %7, %9
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%12 = shufflevector <2 x double> %10, <2 x double> %11, <2 x i32> <i32 0, i32 3>
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%13 = insertelement <2 x double> undef, double %3, i32 0
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%14 = shufflevector <2 x double> %13, <2 x double> undef, <2 x i32> zeroinitializer
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%15 = fdiv <2 x double> %12, %14
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%16 = fptosi <2 x double> %15 to <2 x i32>
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%17 = insertelement <2 x double> undef, double %1, i32 0
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%18 = shufflevector <2 x double> %17, <2 x double> undef, <2 x i32> zeroinitializer
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%19 = fsub <2 x double> %18, %9
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%20 = fadd <2 x double> %18, %9
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%21 = shufflevector <2 x double> %19, <2 x double> %20, <2 x i32> <i32 0, i32 3>
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%22 = insertelement <2 x double> undef, double %4, i32 0
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%23 = shufflevector <2 x double> %22, <2 x double> undef, <2 x i32> zeroinitializer
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%24 = fdiv <2 x double> %21, %23
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%25 = fptosi <2 x double> %24 to <2 x i32>
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%26 = zext <2 x i32> %25 to <2 x i64>
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%27 = shl nuw <2 x i64> %26, <i64 32, i64 32>
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%28 = zext <2 x i32> %16 to <2 x i64>
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%29 = or <2 x i64> %27, %28
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%30 = extractelement <2 x i64> %29, i32 0
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%31 = insertvalue { i64, i64 } undef, i64 %30, 0
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%32 = extractelement <2 x i64> %29, i32 1
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%33 = insertvalue { i64, i64 } %31, i64 %32, 1
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ret { i64, i64 } %33
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}
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