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Arnold Schwaighofer c86f47bee2 ISel: Fix FastISel of swifterror values
The code assumed that we process instructions in basic block order.  FastISel
processes instructions in reverse basic block order. We need to pre-assign
virtual registers before selecting otherwise we get def-use relationships wrong.

This only affects code with swifterror registers.

rdar://32659327

llvm-svn: 305484
2017-06-15 17:34:42 +00:00
2017-06-08 07:32:29 +00:00
2014-03-02 13:08:46 +00:00
2016-01-26 21:29:08 +00:00
2017-05-14 07:55:01 +00:00
2017-01-12 18:02:42 +00:00
2017-03-06 20:45:33 +00:00

Low Level Virtual Machine (LLVM)
================================

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