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Toma Tabacu 3870d18445 [mips] [IAS] Add support for LAReg with identical source and destination register operands.
Summary: In this case, we're supposed to load the immediate in AT and then ADDu it with the source register and put it in the destination register.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9367

llvm-svn: 240278
2015-06-22 13:10:23 +00:00
..
2015-06-09 21:50:22 +00:00
2015-06-09 21:50:22 +00:00