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dd9ab77318
Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
105 lines
2.6 KiB
LLVM
105 lines
2.6 KiB
LLVM
; RUN: llc -spec-exec-max-speculation-cost=0 -march=r600 -r600-ir-structurize=0 -mcpu=redwood < %s | FileCheck %s
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; These tests make sure the compiler is optimizing branches using predicates
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; when it is legal to do so.
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; CHECK-LABEL: {{^}}simple_if:
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; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Pred,
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; CHECK: LSHL * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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define amdgpu_kernel void @simple_if(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%cmp0 = icmp sgt i32 %in, 0
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br i1 %cmp0, label %IF, label %ENDIF
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IF:
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%tmp1 = shl i32 %in, 1
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br label %ENDIF
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ENDIF:
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%tmp2 = phi i32 [ %in, %entry ], [ %tmp1, %IF ]
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store i32 %tmp2, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}simple_if_else:
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; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Pred,
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; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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define amdgpu_kernel void @simple_if_else(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp sgt i32 %in, 0
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br i1 %0, label %IF, label %ELSE
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IF:
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%1 = shl i32 %in, 1
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br label %ENDIF
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ELSE:
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%2 = lshr i32 %in, 1
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br label %ENDIF
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ENDIF:
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%3 = phi i32 [ %1, %IF ], [ %2, %ELSE ]
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}nested_if:
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; CHECK: ALU_PUSH_BEFORE
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; CHECK: JUMP
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; CHECK: POP
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; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Exec
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; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Pred,
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; CHECK: LSHL * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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define amdgpu_kernel void @nested_if(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp sgt i32 %in, 0
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br i1 %0, label %IF0, label %ENDIF
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IF0:
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%1 = add i32 %in, 10
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%2 = icmp sgt i32 %1, 0
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br i1 %2, label %IF1, label %ENDIF
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IF1:
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%3 = shl i32 %1, 1
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br label %ENDIF
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ENDIF:
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%4 = phi i32 [%in, %entry], [%1, %IF0], [%3, %IF1]
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store i32 %4, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: {{^}}nested_if_else:
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; CHECK: ALU_PUSH_BEFORE
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; CHECK: JUMP
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; CHECK: POP
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; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Exec
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; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Pred,
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; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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define amdgpu_kernel void @nested_if_else(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = icmp sgt i32 %in, 0
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br i1 %0, label %IF0, label %ENDIF
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IF0:
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%1 = add i32 %in, 10
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%2 = icmp sgt i32 %1, 0
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br i1 %2, label %IF1, label %ELSE1
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IF1:
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%3 = shl i32 %1, 1
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br label %ENDIF
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ELSE1:
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%4 = lshr i32 %in, 1
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br label %ENDIF
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ENDIF:
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%5 = phi i32 [%in, %entry], [%3, %IF1], [%4, %ELSE1]
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store i32 %5, i32 addrspace(1)* %out
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ret void
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}
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