Matt Arsenault 3ee7b5cf1b AMDGPU: Use 1/2pi inline imm on VI ... I'm guessing at how it is supposed to be printed llvm-svn: 285490		2016-10-29 04:05:06 +00:00
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AMDGPUAsmBackend.cpp	AMDGPU/SI: Emit fixups for long branches	2016-10-07 16:01:18 +00:00
AMDGPUELFObjectWriter.cpp	[AMDGPU] Add 32-bit lo/hi got and pc relative variant kinds and emit appropriate relocations	2016-10-14 04:21:32 +00:00
AMDGPUELFStreamer.cpp
AMDGPUELFStreamer.h
AMDGPUFixupKinds.h	AMDGPU/SI: Refactor fixup handling for constant addrspace variables	2016-06-14 20:29:59 +00:00
AMDGPUMCAsmInfo.cpp	AMDGPU: Set MinInstAlignment	2016-06-27 21:42:49 +00:00
AMDGPUMCAsmInfo.h
AMDGPUMCCodeEmitter.cpp
AMDGPUMCCodeEmitter.h
AMDGPUMCTargetDesc.cpp	Move the global variables representing each Target behind accessor function	2016-10-09 23:00:34 +00:00
AMDGPUMCTargetDesc.h	Move the global variables representing each Target behind accessor function	2016-10-09 23:00:34 +00:00
AMDGPUTargetStreamer.cpp	[AMDGPU] Make note record name a static const member of target streamer	2016-10-20 18:22:36 +00:00
AMDGPUTargetStreamer.h	[AMDGPU] Make note record name a static const member of target streamer	2016-10-20 18:22:36 +00:00
CMakeLists.txt
LLVMBuild.txt
R600MCCodeEmitter.cpp	AMDGPU/R600: Fix GlobalValue regressions.	2016-06-25 18:24:16 +00:00
SIMCCodeEmitter.cpp	AMDGPU: Use 1/2pi inline imm on VI	2016-10-29 04:05:06 +00:00