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2d8bf8b427
Some generic instructions have multiple types. While in theory these always be discovered by inspecting the single definition of each generic vreg, in practice those definitions won't always be local and traipsing through a big function to find them will not be fun. So this changes MIRPrinter to print out the type of uses as well as defs, if they're known to be different or not known to be the same. On the parsing side, we're a little more flexible: provided each register is given a type in at least one place it's mentioned (and all types are consistent) we accept the MIR. This doesn't introduce ambiguity but makes writing tests manually a bit less painful. llvm-svn: 281204
85 lines
2.2 KiB
YAML
85 lines
2.2 KiB
YAML
# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-apple-ios"
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define void @test_load(i8* %addr) {
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entry:
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ret void
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}
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define void @test_store(i8* %addr) {
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entry:
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ret void
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}
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...
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---
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name: test_load
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0.entry:
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liveins: %x0, %x1, %x2, %x3
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; CHECK-LABEL: name: test_load
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%0(p0) = COPY %x0
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; CHECK: [[BIT8:%[0-9]+]](s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
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; CHECK: %1(s1) = G_TRUNC [[BIT8]]
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%1(s1) = G_LOAD %0 :: (load 1 from %ir.addr)
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; CHECK: %2(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
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%2(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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; CHECK: %3(s16) = G_LOAD %0(p0) :: (load 2 from %ir.addr)
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%3(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
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; CHECK: %4(s32) = G_LOAD %0(p0) :: (load 4 from %ir.addr)
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%4(s32) = G_LOAD %0 :: (load 4 from %ir.addr)
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; CHECK: %5(s64) = G_LOAD %0(p0) :: (load 8 from %ir.addr)
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%5(s64) = G_LOAD %0 :: (load 8 from %ir.addr)
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...
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---
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name: test_store
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0.entry:
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liveins: %x0, %x1, %x2, %x3
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; CHECK-LABEL: name: test_store
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%0(p0) = COPY %x0
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%1(s32) = COPY %w1
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; CHECK: [[BIT8:%[0-9]+]](s8) = G_ANYEXT %2(s1)
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; CHECK: G_STORE [[BIT8]](s8), %0(p0) :: (store 1 into %ir.addr)
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%2(s1) = G_TRUNC %1
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G_STORE %2, %0 :: (store 1 into %ir.addr)
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; CHECK: G_STORE %3(s8), %0(p0) :: (store 1 into %ir.addr)
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%3(s8) = G_TRUNC %1
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G_STORE %3, %0 :: (store 1 into %ir.addr)
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; CHECK: G_STORE %4(s16), %0(p0) :: (store 2 into %ir.addr)
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%4(s16) = G_TRUNC %1
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G_STORE %4, %0 :: (store 2 into %ir.addr)
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; CHECK: G_STORE %1(s32), %0(p0) :: (store 4 into %ir.addr)
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G_STORE %1, %0 :: (store 4 into %ir.addr)
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; CHECK: G_STORE %5(s64), %0(p0) :: (store 8 into %ir.addr)
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%5(s64) = G_PTRTOINT %0(p0)
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G_STORE %5, %0 :: (store 8 into %ir.addr)
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...
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