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https://github.com/RPCS3/llvm-mirror.git
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5c5844a79f
Summary: This will be used for 64-bit MULHU, which is in turn used for the 64-bit divide-by-constant optimization (see D24822). Reviewers: arsenm, tstellarAMD Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D25289 llvm-svn: 284224
57 lines
2.0 KiB
LLVM
57 lines
2.0 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}test_i128_vreg:
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; GCN: v_add_i32_e32 v[[LO:[0-9]+]], vcc,
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; GCN-NEXT: v_addc_u32_e32 v{{[0-9]+}}, vcc, v{{[0-9]+}}, v{{[0-9]+}}, vcc
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; GCN-NEXT: v_addc_u32_e32 v{{[0-9]+}}, vcc, v{{[0-9]+}}, v{{[0-9]+}}, vcc
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; GCN-NEXT: v_addc_u32_e32 v[[HI:[0-9]+]], vcc, v{{[0-9]+}}, v{{[0-9]+}}, vcc
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; GCN: buffer_store_dwordx4 v{{\[}}[[LO]]:[[HI]]],
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define void @test_i128_vreg(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %inA, i128 addrspace(1)* noalias %inB) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() readnone
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%a_ptr = getelementptr i128, i128 addrspace(1)* %inA, i32 %tid
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%b_ptr = getelementptr i128, i128 addrspace(1)* %inB, i32 %tid
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%a = load i128, i128 addrspace(1)* %a_ptr
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%b = load i128, i128 addrspace(1)* %b_ptr
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%result = add i128 %a, %b
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store i128 %result, i128 addrspace(1)* %out
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ret void
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}
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; Check that the SGPR add operand is correctly moved to a VGPR.
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; GCN-LABEL: {{^}}sgpr_operand:
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; GCN: v_add_i32
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; GCN: v_addc_u32
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; GCN: v_addc_u32
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; GCN: v_addc_u32
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define void @sgpr_operand(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %in, i128 %a) {
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%foo = load i128, i128 addrspace(1)* %in, align 8
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%result = add i128 %foo, %a
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store i128 %result, i128 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}sgpr_operand_reversed:
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; GCN: v_add_i32
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; GCN: v_addc_u32
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; GCN: v_addc_u32
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; GCN: v_addc_u32
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define void @sgpr_operand_reversed(i128 addrspace(1)* noalias %out, i128 addrspace(1)* noalias %in, i128 %a) {
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%foo = load i128, i128 addrspace(1)* %in, align 8
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%result = add i128 %a, %foo
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store i128 %result, i128 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_sreg:
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; GCN: s_add_u32
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; GCN: s_addc_u32
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; GCN: s_addc_u32
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; GCN: s_addc_u32
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define void @test_sreg(i128 addrspace(1)* noalias %out, i128 %a, i128 %b) {
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%result = add i128 %a, %b
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store i128 %result, i128 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() readnone
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