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llvm-mirror/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll
Matt Arsenault 3bfc10ac74 AMDGPU: Remove legacy rsq.clamped intrinsic
Mesa still has a use of llvm.AMDGPU.rsq.f64 remaining.

Also fix mismatch with non-IEEE rsq selecting to IEEE rsq.

llvm-svn: 275617
2016-07-15 21:26:52 +00:00

29 lines
1.1 KiB
LLVM

; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG %s
declare float @llvm.r600.recipsqrt.ieee.f32(float) nounwind readnone
; EG-LABEL: {{^}}recipsqrt.ieee_f32:
; EG: RECIPSQRT_IEEE
define void @recipsqrt.ieee_f32(float addrspace(1)* %out, float %src) nounwind {
%recipsqrt.ieee = call float @llvm.r600.recipsqrt.ieee.f32(float %src) nounwind readnone
store float %recipsqrt.ieee, float addrspace(1)* %out, align 4
ret void
}
; TODO: Really these should be constant folded
; EG-LABEL: {{^}}recipsqrt.ieee_f32_constant_4.0
; EG: RECIPSQRT_IEEE
define void @recipsqrt.ieee_f32_constant_4.0(float addrspace(1)* %out) nounwind {
%recipsqrt.ieee = call float @llvm.r600.recipsqrt.ieee.f32(float 4.0) nounwind readnone
store float %recipsqrt.ieee, float addrspace(1)* %out, align 4
ret void
}
; EG-LABEL: {{^}}recipsqrt.ieee_f32_constant_100.0
; EG: RECIPSQRT_IEEE
define void @recipsqrt.ieee_f32_constant_100.0(float addrspace(1)* %out) nounwind {
%recipsqrt.ieee = call float @llvm.r600.recipsqrt.ieee.f32(float 100.0) nounwind readnone
store float %recipsqrt.ieee, float addrspace(1)* %out, align 4
ret void
}