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81a9bfe915
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
62 lines
1.9 KiB
LLVM
62 lines
1.9 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=BOTH %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=BOTH %s
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; BOTH-LABEL: {{^}}s_rotr_i64:
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; BOTH-DAG: s_sub_i32
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; BOTH-DAG: s_lshr_b64
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; BOTH-DAG: s_lshl_b64
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; BOTH: s_or_b64
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define void @s_rotr_i64(i64 addrspace(1)* %in, i64 %x, i64 %y) {
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entry:
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%tmp0 = sub i64 64, %y
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%tmp1 = shl i64 %x, %tmp0
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%tmp2 = lshr i64 %x, %y
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%tmp3 = or i64 %tmp1, %tmp2
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store i64 %tmp3, i64 addrspace(1)* %in
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ret void
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}
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; BOTH-LABEL: {{^}}v_rotr_i64:
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; BOTH-DAG: v_sub_i32
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; SI-DAG: v_lshr_b64
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; SI-DAG: v_lshl_b64
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; VI-DAG: v_lshrrev_b64
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; VI-DAG: v_lshlrev_b64
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; BOTH: v_or_b32
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; BOTH: v_or_b32
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define void @v_rotr_i64(i64 addrspace(1)* %in, i64 addrspace(1)* %xptr, i64 addrspace(1)* %yptr) {
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entry:
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%x = load i64, i64 addrspace(1)* %xptr, align 8
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%y = load i64, i64 addrspace(1)* %yptr, align 8
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%tmp0 = sub i64 64, %y
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%tmp1 = shl i64 %x, %tmp0
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%tmp2 = lshr i64 %x, %y
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%tmp3 = or i64 %tmp1, %tmp2
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store i64 %tmp3, i64 addrspace(1)* %in
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ret void
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}
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; BOTH-LABEL: {{^}}s_rotr_v2i64:
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define void @s_rotr_v2i64(<2 x i64> addrspace(1)* %in, <2 x i64> %x, <2 x i64> %y) {
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entry:
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%tmp0 = sub <2 x i64> <i64 64, i64 64>, %y
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%tmp1 = shl <2 x i64> %x, %tmp0
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%tmp2 = lshr <2 x i64> %x, %y
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%tmp3 = or <2 x i64> %tmp1, %tmp2
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store <2 x i64> %tmp3, <2 x i64> addrspace(1)* %in
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ret void
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}
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; BOTH-LABEL: {{^}}v_rotr_v2i64:
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define void @v_rotr_v2i64(<2 x i64> addrspace(1)* %in, <2 x i64> addrspace(1)* %xptr, <2 x i64> addrspace(1)* %yptr) {
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entry:
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%x = load <2 x i64>, <2 x i64> addrspace(1)* %xptr, align 8
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%y = load <2 x i64>, <2 x i64> addrspace(1)* %yptr, align 8
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%tmp0 = sub <2 x i64> <i64 64, i64 64>, %y
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%tmp1 = shl <2 x i64> %x, %tmp0
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%tmp2 = lshr <2 x i64> %x, %y
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%tmp3 = or <2 x i64> %tmp1, %tmp2
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store <2 x i64> %tmp3, <2 x i64> addrspace(1)* %in
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ret void
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}
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