mirror of
https://github.com/RPCS3/llvm-mirror.git
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fd16bf61d8
llvm-svn: 32740
357 lines
11 KiB
C++
357 lines
11 KiB
C++
//===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format ARM assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "ARM.h"
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#include "ARMInstrInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/MathExtras.h"
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#include <cctype>
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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switch (CC) {
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default: assert(0 && "Unknown condition code");
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case ARMCC::EQ: return "eq";
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case ARMCC::NE: return "ne";
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case ARMCC::CS: return "cs";
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case ARMCC::CC: return "cc";
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case ARMCC::MI: return "mi";
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case ARMCC::PL: return "pl";
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case ARMCC::VS: return "vs";
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case ARMCC::VC: return "vc";
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case ARMCC::HI: return "hi";
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case ARMCC::LS: return "ls";
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case ARMCC::GE: return "ge";
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case ARMCC::LT: return "lt";
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case ARMCC::GT: return "gt";
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case ARMCC::LE: return "le";
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case ARMCC::AL: return "al";
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}
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}
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struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
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ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
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: AsmPrinter(O, TM, T) {
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}
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/// We name each basic block in a Function with a unique number, so
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/// that we can consistently refer to them later. This is cleared
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/// at the beginning of each call to runOnMachineFunction().
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///
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typedef std::map<const Value *, unsigned> ValueMapTy;
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ValueMapTy NumberForBB;
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virtual const char *getPassName() const {
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return "ARM Assembly Printer";
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}
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void printAddrMode1(const MachineInstr *MI, int opNum);
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void printAddrMode2(const MachineInstr *MI, int opNum);
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void printAddrMode5(const MachineInstr *MI, int opNum);
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void printOperand(const MachineInstr *MI, int opNum);
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void printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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void printCCOperand(const MachineInstr *MI, int opNum);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doFinalization(Module &M);
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};
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} // end of anonymous namespace
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#include "ARMGenAsmWriter.inc"
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/// createARMCodePrinterPass - Returns a pass that prints the ARM
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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FunctionPass *llvm::createARMCodePrinterPass(std::ostream &o,
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TargetMachine &tm) {
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return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
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}
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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SetupMachineFunction(MF);
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O << "\n\n";
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// Print out constants referenced by the function
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EmitConstantPool(MF.getConstantPool());
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const std::vector<MachineConstantPoolEntry>
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&CP = MF.getConstantPool()->getConstants();
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for (unsigned i = 0, e = CP.size(); i != e; ++i) {
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MachineConstantPoolEntry CPE = CP[i];
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if (!CPE.isMachineConstantPoolEntry()){
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Constant *CV = CPE.Val.ConstVal;
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if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV)) {
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if (GV->hasExternalWeakLinkage()) {
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ExtWeakSymbols.insert(GV);
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}
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}
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}
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}
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// Print out jump tables referenced by the function
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EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
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// Print out labels for the function.
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const Function *F = MF.getFunction();
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SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
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switch (F->getLinkage()) {
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default: assert(0 && "Unknown linkage type!");
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case Function::InternalLinkage:
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break;
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case Function::ExternalLinkage:
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O << "\t.globl\t" << CurrentFnName << "\n";
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break;
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case Function::WeakLinkage:
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case Function::LinkOnceLinkage:
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O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
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break;
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}
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EmitAlignment(2, F);
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O << CurrentFnName << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I != MF.begin()) {
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printBasicBlockLabel(I, true);
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O << '\n';
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}
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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++EmittedInsts;
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printInstruction(II);
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}
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}
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return false;
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}
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void ARMAsmPrinter::printAddrMode1(const MachineInstr *MI, int opNum) {
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const MachineOperand &Arg = MI->getOperand(opNum);
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const MachineOperand &Shift = MI->getOperand(opNum + 1);
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const MachineOperand &ShiftType = MI->getOperand(opNum + 2);
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if(Arg.isImmediate()) {
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assert(Shift.getImmedValue() == 0);
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printOperand(MI, opNum);
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} else {
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assert(Arg.isRegister());
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printOperand(MI, opNum);
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if(Shift.isRegister() || Shift.getImmedValue() != 0) {
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const char *s = NULL;
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switch(ShiftType.getImmedValue()) {
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case ARMShift::LSL:
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s = ", lsl ";
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break;
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case ARMShift::LSR:
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s = ", lsr ";
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break;
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case ARMShift::ASR:
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s = ", asr ";
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break;
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case ARMShift::ROR:
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s = ", ror ";
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break;
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case ARMShift::RRX:
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s = ", rrx ";
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break;
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}
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O << s;
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printOperand(MI, opNum + 1);
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}
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}
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}
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void ARMAsmPrinter::printAddrMode2(const MachineInstr *MI, int opNum) {
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const MachineOperand &Arg = MI->getOperand(opNum);
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const MachineOperand &Offset = MI->getOperand(opNum + 1);
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assert(Offset.isImmediate());
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if (Arg.isConstantPoolIndex()) {
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assert(Offset.getImmedValue() == 0);
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printOperand(MI, opNum);
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} else {
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assert(Arg.isRegister());
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O << '[';
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printOperand(MI, opNum);
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O << ", ";
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printOperand(MI, opNum + 1);
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O << ']';
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}
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}
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void ARMAsmPrinter::printAddrMode5(const MachineInstr *MI, int opNum) {
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const MachineOperand &Arg = MI->getOperand(opNum);
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const MachineOperand &Offset = MI->getOperand(opNum + 1);
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assert(Offset.isImmediate());
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if (Arg.isConstantPoolIndex()) {
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assert(Offset.getImmedValue() == 0);
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printOperand(MI, opNum);
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} else {
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assert(Arg.isRegister());
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O << '[';
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printOperand(MI, opNum);
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O << ", ";
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printOperand(MI, opNum + 1);
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O << ']';
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}
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}
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void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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const MachineOperand &MO = MI->getOperand (opNum);
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
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O << LowercaseString (RI.get(MO.getReg()).Name);
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else
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assert(0 && "not implemented");
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break;
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case MachineOperand::MO_Immediate:
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O << "#" << (int)MO.getImmedValue();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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case MachineOperand::MO_GlobalAddress: {
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GlobalValue *GV = MO.getGlobal();
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std::string Name = Mang->getValueName(GV);
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O << Name;
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if (GV->hasExternalWeakLinkage()) {
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ExtWeakSymbols.insert(GV);
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}
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}
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << TAI->getGlobalPrefix() << MO.getSymbolName();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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<< '_' << MO.getConstantPoolIndex();
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break;
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default:
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O << "<unknown operand type>"; abort (); break;
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}
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}
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void ARMAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier) {
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assert(0 && "not implemented");
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}
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void ARMAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) {
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int CC = (int)MI->getOperand(opNum).getImmedValue();
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O << ARMCondCodeToString((ARMCC::CondCodes)CC);
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}
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bool ARMAsmPrinter::doInitialization(Module &M) {
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AsmPrinter::doInitialization(M);
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return false; // success
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}
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bool ARMAsmPrinter::doFinalization(Module &M) {
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const TargetData *TD = TM.getTargetData();
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for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
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I != E; ++I) {
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if (!I->hasInitializer()) // External global require no code
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continue;
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if (EmitSpecialLLVMGlobal(I))
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continue;
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O << "\n\n";
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD->getTypeSize(C->getType());
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unsigned Align = Log2_32(TD->getTypeAlignment(C->getType()));
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if (C->isNullValue() &&
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!I->hasSection() &&
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(I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
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I->hasWeakLinkage())) {
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SwitchToDataSection(".data", I);
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if (I->hasInternalLinkage())
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O << "\t.local " << name << "\n";
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O << "\t.comm " << name << "," << Size
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<< "," << (unsigned) (1 << Align);
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O << "\n";
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} else {
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switch (I->getLinkage()) {
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default:
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assert(0 && "Unknown linkage type!");
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break;
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case GlobalValue::ExternalLinkage:
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O << "\t.globl " << name << "\n";
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break;
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case GlobalValue::InternalLinkage:
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break;
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}
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if (I->hasSection() &&
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(I->getSection() == ".ctors" ||
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I->getSection() == ".dtors")) {
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std::string SectionName = ".section " + I->getSection();
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SectionName += ",\"aw\",%progbits";
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SwitchToDataSection(SectionName.c_str());
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} else {
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SwitchToDataSection(TAI->getDataSection(), I);
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}
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EmitAlignment(Align, I);
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O << "\t.type " << name << ", %object\n";
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O << "\t.size " << name << ", " << Size << "\n";
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O << name << ":\n";
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EmitGlobalConstant(C);
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}
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}
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AsmPrinter::doFinalization(M);
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return false; // success
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}
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