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07dc6b6937
Atomic comparison instructions use the sub-word load instruction on Power8 and up but the value is not sign extended prior to the signed word compare instruction. This patch adds that sign extension. llvm-svn: 282182
70 lines
2.2 KiB
LLVM
70 lines
2.2 KiB
LLVM
; RUN: llc < %s -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown | FileCheck %s
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define i8 @atomic_min_i8() {
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top:
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%0 = alloca i8, align 2
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%1 = bitcast i8* %0 to i8*
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call void @llvm.lifetime.start(i64 2, i8* %1)
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store i8 -1, i8* %0, align 2
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%2 = atomicrmw min i8* %0, i8 0 acq_rel
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%3 = load atomic i8, i8* %0 acquire, align 8
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call void @llvm.lifetime.end(i64 2, i8* %1)
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ret i8 %3
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; CHECK-LABEL: atomic_min_i8
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; CHECK: lbarx [[DST:[0-9]+]],
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; CHECK-NEXT: extsb [[EXT:[0-9]+]], [[DST]]
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; CHECK-NEXT: cmpw {{[0-9]+}}, [[EXT]]
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; CHECK-NEXT: bge 0
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}
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define i16 @atomic_min_i16() {
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top:
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%0 = alloca i16, align 2
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%1 = bitcast i16* %0 to i8*
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call void @llvm.lifetime.start(i64 2, i8* %1)
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store i16 -1, i16* %0, align 2
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%2 = atomicrmw min i16* %0, i16 0 acq_rel
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%3 = load atomic i16, i16* %0 acquire, align 8
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call void @llvm.lifetime.end(i64 2, i8* %1)
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ret i16 %3
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; CHECK-LABEL: atomic_min_i16
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; CHECK: lharx [[DST:[0-9]+]],
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; CHECK-NEXT: extsh [[EXT:[0-9]+]], [[DST]]
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; CHECK-NEXT: cmpw {{[0-9]+}}, [[EXT]]
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; CHECK-NEXT: bge 0
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}
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define i8 @atomic_max_i8() {
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top:
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%0 = alloca i8, align 2
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%1 = bitcast i8* %0 to i8*
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call void @llvm.lifetime.start(i64 2, i8* %1)
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store i8 -1, i8* %0, align 2
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%2 = atomicrmw max i8* %0, i8 0 acq_rel
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%3 = load atomic i8, i8* %0 acquire, align 8
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call void @llvm.lifetime.end(i64 2, i8* %1)
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ret i8 %3
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; CHECK-LABEL: atomic_max_i8
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; CHECK: lbarx [[DST:[0-9]+]],
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; CHECK-NEXT: extsb [[EXT:[0-9]+]], [[DST]]
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; CHECK-NEXT: cmpw {{[0-9]+}}, [[EXT]]
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; CHECK-NEXT: ble 0
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}
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define i16 @atomic_max_i16() {
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top:
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%0 = alloca i16, align 2
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%1 = bitcast i16* %0 to i8*
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call void @llvm.lifetime.start(i64 2, i8* %1)
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store i16 -1, i16* %0, align 2
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%2 = atomicrmw max i16* %0, i16 0 acq_rel
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%3 = load atomic i16, i16* %0 acquire, align 8
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call void @llvm.lifetime.end(i64 2, i8* %1)
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ret i16 %3
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; CHECK-LABEL: atomic_max_i16
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; CHECK: lharx [[DST:[0-9]+]],
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; CHECK-NEXT: extsh [[EXT:[0-9]+]], [[DST]]
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; CHECK-NEXT: cmpw {{[0-9]+}}, [[EXT]]
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; CHECK-NEXT: ble 0
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}
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declare void @llvm.lifetime.start(i64, i8*)
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declare void @llvm.lifetime.end(i64, i8*)
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