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cb36737365
A target intrinsic may be defined as possibly reading memory, but the call site may have additional knowledge that it doesn't read memory. The intrinsic lowering will expect the pessimistic assumption of the intrinsic definition, so the chain should still be used. I fixed the same bug in SelectionDAG in r287593. llvm-svn: 363580
22 lines
851 B
LLVM
22 lines
851 B
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel -stop-after=irtranslator -o - %s | FileCheck %s
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; Make sure that an intrinsic declaration that has side effects, but
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; called with a readnone call site is translated to
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; G_INTRINSIC_W_SIDE_EFFECTS
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; CHECK-LABEL: name: getreg_callsite_attributes
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; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.getreg)
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; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.getreg)
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define amdgpu_kernel void @getreg_callsite_attributes() {
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%reg0 = call i32 @llvm.amdgcn.s.getreg(i32 0)
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store volatile i32 %reg0, i32 addrspace(1)* undef
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%reg1 = call i32 @llvm.amdgcn.s.getreg(i32 0) #1
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store volatile i32 %reg1, i32 addrspace(1)* undef
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ret void
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}
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declare i32 @llvm.amdgcn.s.getreg(i32) #0
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attributes #0 = { nounwind readonly inaccessiblememonly }
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attributes #1 = { nounwind readnone }
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