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b9148f5d85
Summary: Extend cachepolicy operand in the new VMEM buffer intrinsics to supply information whether the buffer data is swizzled. Also, propagate this information to MIR. Intrinsics updated: int_amdgcn_raw_buffer_load int_amdgcn_raw_buffer_load_format int_amdgcn_raw_buffer_store int_amdgcn_raw_buffer_store_format int_amdgcn_raw_tbuffer_load int_amdgcn_raw_tbuffer_store int_amdgcn_struct_buffer_load int_amdgcn_struct_buffer_load_format int_amdgcn_struct_buffer_store int_amdgcn_struct_buffer_store_format int_amdgcn_struct_tbuffer_load int_amdgcn_struct_tbuffer_store Furthermore, disable merging of VMEM buffer instructions in SI Load/Store optimizer, if the "swizzled" bit on the instruction is on. The default value of the bit is 0, meaning that data in buffer is linear and buffer instructions can be merged. There is no difference in the generated code with this commit. However, in the future it will be expected that front-ends use buffer intrinsics with correct "swizzled" bit set. Reviewers: arsenm, nhaehnle, tpr Reviewed By: nhaehnle Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, arphaman, jfb, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68200 llvm-svn: 373491
277 lines
8.2 KiB
YAML
277 lines
8.2 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: hazard_lds_branch_buf
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: hazard_lds_branch_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_buf_branch_lds
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: DS_READ_B32
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---
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name: hazard_buf_branch_lds
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_branch_lds
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# GCN: bb.1:
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# GCN-NEXT: DS_READ_B32
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---
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name: no_hazard_lds_branch_lds
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_buf_branch_buf
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# GCN: bb.1:
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_buf_branch_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_branch_buf_fallthrough
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# GCN: bb.1:
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_lds_branch_buf_fallthrough
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_branch_buf_samebb
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# GCN: DS_READ_B32
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_lds_branch_buf_samebb
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body: |
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bb.0:
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_lds_branch_buf_loop
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: DS_READ_B32
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: hazard_lds_branch_buf_loop
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body: |
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bb.0:
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successors: %bb.0
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.0
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...
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# GCN-LABEL: name: single_hazard_lds_branch_buf
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: single_hazard_lds_branch_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_branch_lds_buf
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# GCN: bb.1:
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# GCN-NEXT: DS_READ_B32
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_lds_branch_lds_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_buf_branch_buf
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# GCN: bb.1:
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_lds_buf_branch_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_lds_branch_vscnt_1_buf
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: hazard_lds_branch_vscnt_1_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_WAITCNT_VSCNT undef $sgpr_null, 1
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_branch_vscnt_0_buf
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# GCN: bb.1:
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# GCN-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_lds_branch_vscnt_0_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_WAITCNT_VSCNT undef $sgpr_null, 0
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_lds_branch_vscnt_s0_buf
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: hazard_lds_branch_vscnt_s0_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_WAITCNT_VSCNT undef $sgpr0, 0
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_vscnt_0_branch_buf
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# GCN: bb.1:
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# GCN-NEXT: BUFFER_LOAD_DWORD_OFFEN
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---
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name: no_hazard_lds_vscnt_0_branch_buf
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_WAITCNT_VSCNT undef $sgpr_null, 0
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN undef $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_lds_branch_global
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: GLOBAL_LOAD_DWORD
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---
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name: hazard_lds_branch_global
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = GLOBAL_LOAD_DWORD undef $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_lds_branch_scratch
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# GCN: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: SCRATCH_LOAD_DWORD
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---
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name: hazard_lds_branch_scratch
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = SCRATCH_LOAD_DWORD undef $vgpr0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_lds_branch_flat
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# GCN: bb.1:
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# GCN-NEXT: FLAT_LOAD_DWORD
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---
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name: no_hazard_lds_branch_flat
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body: |
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bb.0:
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successors: %bb.1
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$vgpr1 = DS_READ_B32 undef $vgpr0, 0, 0, implicit $m0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = FLAT_LOAD_DWORD undef $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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S_ENDPGM 0
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...
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