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582ae3d23e
CorrectExtraCFGEdges function. The latter was a workaround for "Various pieces of code" leaving bogus extra CFG edges in place. Where by "various" it meant only IfConverter::MergeBlocks, which failed to clear all of the successors of dead blocks it emptied out. This wouldn't matter a whole lot, except that the dead blocks remained listed as predecessors of still-useful blocks, inhibiting optimizations. This fix slightly changed two thumb tests, because the correct CFG successors allowed for the "diamond" if-conversion pattern to be detected, when it could only use "simple" before. Additionally, the removal of a now-redundant call to analyzeBranch (with AllowModify=true) in BranchFolder::OptimizeFunction caused a later check for an empty block in BranchFolder::OptimizeBlock to fail. Correct this by moving the call to analyzeBranch in OptimizeBlock higher. Differential Revision: https://reviews.llvm.org/D79527
34 lines
749 B
LLVM
34 lines
749 B
LLVM
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s
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; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-CMP
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; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-BX
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define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: t1:
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; CHECK: cmp r2, #7
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; CHECK: cmpne r2, #1
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switch i32 %c, label %cond_next [
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i32 1, label %cond_true
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i32 7, label %cond_true
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]
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cond_true:
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; CHECK: addne r0
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; CHECK: addeq r0
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; CHECK: addeq r0
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; CHECK: bx
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%tmp12 = add i32 %a, 1
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%tmp1518 = add i32 %tmp12, %b
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ret i32 %tmp1518
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cond_next:
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%tmp15 = add i32 %b, %a
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ret i32 %tmp15
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}
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; CHECK-V4-CMP: cmpne
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; CHECK-V4-CMP-NOT: cmpne
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; CHECK-V4-BX: bx
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; CHECK-V4-BX-NOT: bx
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