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136d9afbf0
On Powerpc, set instruction count as lsr first priority of lsr by default. Add an option ppc-lsr-no-insns-cost to return back to default lsr cost model. Reviewed By: steven.zhang, jsji Differential Revision: https://reviews.llvm.org/D72683
78 lines
2.7 KiB
LLVM
78 lines
2.7 KiB
LLVM
; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs < %s \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=INST
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; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -ppc-lsr-no-insns-cost=true \
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; RUN: < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=REG
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; void test(unsigned *a, unsigned *b, unsigned *c)
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; {
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; for (unsigned long i = 0; i < 1024; i++)
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; c[i] = a[i] + b[i];
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; }
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;
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; compile with -fno-unroll-loops
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define void @lsr-insts-cost(i32* %0, i32* %1, i32* %2) {
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; INST-LABEL: lsr-insts-cost
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; INST: .LBB0_4: # =>This Inner Loop Header: Depth=1
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; INST-NEXT: lxvd2x vs34, r3, r6
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; INST-NEXT: lxvd2x vs35, r4, r6
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; INST-NEXT: vadduwm v2, v3, v2
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; INST-NEXT: stxvd2x vs34, r5, r6
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; INST-NEXT: addi r6, r6, 16
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; INST-NEXT: bdnz .LBB0_4
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;
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; REG-LABEL: lsr-insts-cost
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; REG: .LBB0_4: # =>This Inner Loop Header: Depth=1
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; REG-NEXT: lxvd2x vs34, 0, r3
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; REG-NEXT: lxvd2x vs35, 0, r4
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; REG-NEXT: addi r4, r4, 16
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; REG-NEXT: addi r3, r3, 16
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; REG-NEXT: vadduwm v2, v3, v2
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; REG-NEXT: stxvd2x vs34, 0, r5
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; REG-NEXT: addi r5, r5, 16
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; REG-NEXT: bdnz .LBB0_4
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%4 = getelementptr i32, i32* %2, i64 1024
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%5 = getelementptr i32, i32* %0, i64 1024
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%6 = getelementptr i32, i32* %1, i64 1024
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%7 = icmp ugt i32* %5, %2
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%8 = icmp ugt i32* %4, %0
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%9 = and i1 %7, %8
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%10 = icmp ugt i32* %6, %2
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%11 = icmp ugt i32* %4, %1
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%12 = and i1 %10, %11
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%13 = or i1 %9, %12
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br i1 %13, label %28, label %14
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14: ; preds = %3, %14
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%15 = phi i64 [ %25, %14 ], [ 0, %3 ]
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%16 = getelementptr inbounds i32, i32* %0, i64 %15
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%17 = bitcast i32* %16 to <4 x i32>*
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%18 = load <4 x i32>, <4 x i32>* %17, align 4
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%19 = getelementptr inbounds i32, i32* %1, i64 %15
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%20 = bitcast i32* %19 to <4 x i32>*
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%21 = load <4 x i32>, <4 x i32>* %20, align 4
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%22 = add <4 x i32> %21, %18
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%23 = getelementptr inbounds i32, i32* %2, i64 %15
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%24 = bitcast i32* %23 to <4 x i32>*
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store <4 x i32> %22, <4 x i32>* %24, align 4
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%25 = add i64 %15, 4
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%26 = icmp eq i64 %25, 1024
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br i1 %26, label %27, label %14
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27: ; preds = %14, %28
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ret void
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28: ; preds = %3, %28
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%29 = phi i64 [ %36, %28 ], [ 0, %3 ]
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%30 = getelementptr inbounds i32, i32* %0, i64 %29
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%31 = load i32, i32* %30, align 4
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%32 = getelementptr inbounds i32, i32* %1, i64 %29
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%33 = load i32, i32* %32, align 4
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%34 = add i32 %33, %31
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%35 = getelementptr inbounds i32, i32* %2, i64 %29
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store i32 %34, i32* %35, align 4
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%36 = add nuw nsw i64 %29, 1
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%37 = icmp eq i64 %36, 1024
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br i1 %37, label %27, label %28
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}
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