Matt Arsenault c95b3bd8df AMDGPU/GlobalISel: Implement custom kernel arg lowering ... Avoid using allocateKernArg / AssignFn. We do not want any of the type splitting properties of normal calling convention lowering. For now at least this exists alongside the IR argument lowering pass. This is necessary to handle struct padding correctly while some arguments are still skipped by the IR argument lowering pass. llvm-svn: 336373		2018-07-05 17:01:20 +00:00
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AArch64	[AArch64, PowerPC, x86] add tests for signbit bit hacks; NFC	2018-07-05 13:16:46 +00:00
AMDGPU	AMDGPU/GlobalISel: Implement custom kernel arg lowering	2018-07-05 17:01:20 +00:00
ARC
ARM	[NEON] Fix combining of vldx_dup intrinsics with updating of base addresses	2018-07-05 08:59:49 +00:00
AVR
BPF
Generic	Implement strip.invariant.group	2018-07-02 04:49:30 +00:00
Hexagon	[DAGCombiner] Ensure we use the correct CC result type in visitSDIV (REAPPLIED)	2018-06-28 17:33:41 +00:00
Inputs
Lanai
Mips	[mips] Fix atomic operations at O0, v3	2018-07-05 09:27:05 +00:00
MIR
MSP430
Nios2
NVPTX	NFC - Various typo fixes in tests	2018-07-04 13:28:39 +00:00
PowerPC	[Power9] Add lib calls for float128 operations with no equivalent PPC instructions	2018-07-05 15:21:37 +00:00
RISCV	[RISCV] Add machine function pass to merge base + offset	2018-06-27 20:51:42 +00:00
SPARC	NFC - Various typo fixes in tests	2018-07-04 13:28:39 +00:00
SystemZ	Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"	2018-06-22 10:53:47 +00:00
Thumb
Thumb2
WebAssembly	Partially revert r336268 in address-offsets.ll	2018-07-05 11:30:15 +00:00
WinCFGuard
WinEH
X86	[X86][SSE] Add srem x, (1 << c) combine tests	2018-07-05 15:15:47 +00:00
XCore