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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 20:12:56 +02:00
llvm-mirror/test/CodeGen
Chris Lattner c9709f154d Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190
2010-10-11 05:44:40 +00:00
..
Alpha PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually 2010-08-01 21:13:28 +00:00
ARM Correct some load / store instruction itinerary mistakes: 2010-10-09 01:03:04 +00:00
Blackfin
CBackend
CellSPU Zap some redundant 'ori $?, $?, 0' from SPU. 2010-10-01 09:20:01 +00:00
CPP
Generic
MBlaze
Mips Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
MSP430 CombinerAA is now reordering these stores. 2010-09-20 20:56:29 +00:00
PowerPC force a triple, varargs isn't supported with the SVR4 ABI the buildbot tells me. 2010-10-10 18:59:01 +00:00
PTX Add test case for PTX ret instruction 2010-09-25 07:49:54 +00:00
SPARC
SystemZ Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
Thumb Try again to disable critical edge splitting in CodeGenPrepare. 2010-09-30 20:51:52 +00:00
Thumb2 Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
X86 X86: MinGW should always use libgcc on Windows. 2010-10-10 23:11:06 +00:00
XCore Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
thumb2-mul.ll Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00