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4de6e44893
The KORTEST was introduced due to a bug where a TEST instruction used a K register. but, turns out that the opposite case of KORTEST using a GPR is now happening The change removes the KORTEST flow and adds a COPY instruction from the K reg to a GPR. Differential Revision: https://reviews.llvm.org/D24953 llvm-svn: 282580
56 lines
1.7 KiB
LLVM
56 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 -mattr=+avx512f < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.11.0"
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define i32 @test(float %a, float %b) {
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; CHECK-LABEL: test:
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; CHECK: ## BB#0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: Ltmp0:
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: vucomiss %xmm1, %xmm0
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; CHECK-NEXT: setnp %cl
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; CHECK-NEXT: sete %dl
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; CHECK-NEXT: setp %sil
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; CHECK-NEXT: setne %dil
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; CHECK-NEXT: andb %cl, %dl
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; CHECK-NEXT: ## implicit-def: %R8D
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; CHECK-NEXT: movb %dl, %r8b
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; CHECK-NEXT: andl $1, %r8d
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; CHECK-NEXT: kmovw %r8d, %k0
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; CHECK-NEXT: orb %sil, %dil
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; CHECK-NEXT: ## implicit-def: %R8D
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; CHECK-NEXT: movb %dil, %r8b
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; CHECK-NEXT: andl $1, %r8d
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; CHECK-NEXT: kmovw %r8d, %k1
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; CHECK-NEXT: kmovw %k1, %ecx
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; CHECK-NEXT: testb $1, %cl
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; CHECK-NEXT: movb %al, {{[0-9]+}}(%rsp) ## 1-byte Spill
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; CHECK-NEXT: kmovw %k0, {{[0-9]+}}(%rsp) ## 2-byte Spill
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; CHECK-NEXT: jne LBB0_1
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; CHECK-NEXT: jmp LBB0_2
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; CHECK-NEXT: LBB0_1: ## %L_0
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; CHECK-NEXT: callq ___assert_rtn
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; CHECK-NEXT: LBB0_2: ## %L_1
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: retq
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%x10 = fcmp oeq float %a, %b
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%x11 = xor i1 %x10, true
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br i1 %x11, label %L_0, label %L_1
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L_0: ; preds = %2
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call void @__assert_rtn()
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unreachable
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; No predecessors!
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L_1: ; preds = %2
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ret i32 0
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}
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; Function Attrs: noreturn
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declare void @__assert_rtn()
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