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c9b9d62c33
llvm-mirror/lib/Target/AArch64
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Cullen Rhodes c9b9d62c33 [AArch64][SVE2] Use destination register as source register 
Summary:
This patch fixes a bug in the following instructions that should have been
implemented as destructive. A destructive instruction is an instruction where
one of the source registers also acts as the destination register. Therefore,
the contents of the source register, when the instruction begins execution, are
replaced by the result of the instruction when the instruction completes
execution [1]:

  * SRI/SLI
  * EORBT/EORTB
  * TBX
  * Narrowing top instructions
  * FP convert precision instructions

These changes are non-functional from the assembler/diassembler point-of-view
but are necessary for correct codegen.

[1] https://static.docs.arm.com/ddi0584/ae/DDI0584A_e_SVE_supp_armv8A.pdf

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D65389

llvm-svn: 367394
2019-07-31 08:45:57 +00:00
..
AsmParser [AArch64][SVE2] Rename bitperm feature to sve2-bitperm 2019-07-26 15:57:50 +00:00
Disassembler Revert CMake: Make most target symbols hidden by default 2019-06-11 03:21:13 +00:00
MCTargetDesc MC: AArch64: Add support for prel_g* relocation specifiers. 2019-07-18 16:54:33 +00:00
TargetInfo Revert CMake: Make most target symbols hidden by default 2019-06-11 03:21:13 +00:00
Utils
AArch64.h Basic MTE stack tagging instrumentation. 2019-07-17 19:24:12 +00:00
AArch64.td [AArch64][SVE2] Rename bitperm feature to sve2-bitperm 2019-07-26 15:57:50 +00:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp Fix "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI. 2019-07-10 10:34:44 +00:00
AArch64BranchTargets.cpp
AArch64CallingConvention.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td [COFF, ARM64] Fix ABI implementation of struct returns 2019-05-03 21:12:36 +00:00
AArch64CallLowering.cpp [AArch64 GlobalISel] Cleanup CallLowering. NFCI 2019-06-27 09:24:30 +00:00
AArch64CallLowering.h [AArch64 GlobalISel] Cleanup CallLowering. NFCI 2019-06-27 09:24:30 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64CompressJumpTables.cpp [AArch64] Fix scan-build null/uninitialized pointer warnings. NFCI. 2019-05-08 16:27:24 +00:00
AArch64CondBrTuning.cpp
AArch64ConditionalCompares.cpp [IR] Refactor attribute methods in Function class (NFC) 2019-04-04 22:40:06 +00:00
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandImm.cpp [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
AArch64ExpandImm.h
AArch64ExpandPseudoInsts.cpp Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64FalkorHWPFFix.cpp CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
AArch64FastISel.cpp Fix parameter name comments using clang-tidy. NFC. 2019-07-16 04:46:31 +00:00
AArch64FrameLowering.cpp Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64FrameLowering.h Factor out resolveFrameOffsetReference (NFC). 2019-07-12 21:13:55 +00:00
AArch64GenRegisterBankInfo.def [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms. 2019-07-03 01:49:06 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td AArch64: Unify relocation restrictions between MOVK/MOVN/MOVZ. 2019-07-18 16:51:53 +00:00
AArch64InstrInfo.cpp Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64InstrInfo.h [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection. 2019-06-08 06:19:15 +00:00
AArch64InstrInfo.td [AArch64][SVE2] Rename bitperm feature to sve2-bitperm 2019-07-26 15:57:50 +00:00
AArch64InstructionSelector.cpp [AArch64][GlobalISel] Select @llvm.aarch64.stlxr for 32-bit pointers 2019-07-26 23:28:53 +00:00
AArch64ISelDAGToDAG.cpp Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64ISelLowering.cpp [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold 2019-07-24 22:57:22 +00:00
AArch64ISelLowering.h [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold 2019-07-24 22:57:22 +00:00
AArch64LegalizerInfo.cpp [AArch64][GlobalISel] Implement narrowing of G_SEXT. 2019-07-26 23:46:38 +00:00
AArch64LegalizerInfo.h [GlobalISel] Translate calls to memcpy et al to G_INTRINSIC_W_SIDE_EFFECTs and legalize later. 2019-07-19 00:24:45 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Remove scan-build "Value stored during its initialization is never read" warnings. NFCI. 2019-05-08 16:29:39 +00:00
AArch64MachineFunctionInfo.h Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64MacroFusion.cpp
AArch64MacroFusion.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PfmCounters.td
AArch64PreLegalizerCombiner.cpp [GlobalISel] Support for inlining memcpy, memset and memmove calls. 2019-07-24 22:17:31 +00:00
AArch64PromoteConstant.cpp
AArch64RedundantCopyElimination.cpp CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
AArch64RegisterBankInfo.cpp [AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs. 2019-07-23 22:05:13 +00:00
AArch64RegisterBankInfo.h [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms. 2019-07-03 01:49:06 +00:00
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64RegisterInfo.h CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedA57.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedExynosM1.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedExynosM3.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedExynosM4.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedFalkor.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedFalkorDetails.td
AArch64SchedKryo.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedKryoDetails.td
AArch64SchedPredExynos.td [AArch64] Update for Exynos 2019-05-02 22:01:39 +00:00
AArch64SchedPredicates.td [AArch64] Update for Exynos 2019-05-02 22:01:39 +00:00
AArch64SchedThunderX2T99.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedThunderX.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64SelectionDAGInfo.h Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64SIMDInstrOpt.cpp
AArch64SpeculationHardening.cpp
AArch64StackTagging.cpp Speculative fix for stack-tagging.ll failure. 2019-07-17 21:27:44 +00:00
AArch64StorePairSuppress.cpp [CodeGen] Add "const" to MachineInstr::mayAlias 2019-04-19 09:08:38 +00:00
AArch64Subtarget.cpp [ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1 2019-07-25 10:59:45 +00:00
AArch64Subtarget.h [AArch64] Define ETE and TRBE system registers 2019-07-26 09:19:08 +00:00
AArch64SVEInstrInfo.td [AArch64][SVE2] Use destination register as source register 2019-07-31 08:45:57 +00:00
AArch64SystemOperands.td [AArch64] Define ETE and TRBE system registers 2019-07-26 09:19:08 +00:00
AArch64TargetMachine.cpp Basic MTE stack tagging instrumentation. 2019-07-17 19:24:12 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces" 2019-07-10 18:25:58 +00:00
AArch64TargetTransformInfo.h Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces" 2019-07-10 18:25:58 +00:00
CMakeLists.txt Basic MTE stack tagging instrumentation. 2019-07-17 19:24:12 +00:00
LLVMBuild.txt [AArch64] Add dependency from AArch64CodeGen to TransformUtils to fix -DBUILD_SHARED_LIBS=on link error after D64173/r366361 2019-07-18 01:53:08 +00:00
SVEInstrFormats.td [AArch64][SVE2] Use destination register as source register 2019-07-31 08:45:57 +00:00