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llvm-mirror/test/CodeGen
Fangrui Song 19fb620829 [PPC32] Emit R_PPC_PLTREL24 for calls to dso_local ifunc
static void *ifunc(void) __attribute__((ifunc("resolver")));
  void foo() { ifunc(); }

The relocation produced by the ifunc() call:

1. gcc -msecure-plt -fPIC => R_PPC_PLTREL24 r_addend=0x8000
2. gcc -msecure-plt -PIE => R_PPC_PLTREL24 r_addend=0x8000
3. clang -msecure-plt -fPIC => R_PPC_PLTREL24 r_addend=0x8000
4. clang -msecure-plt -fPIE => R_PPC_REL24

4 is incorrect. The R_PPC_REL24 needs a call stub due to ifunc. If this
relocation is mixed with other R_PPC_PLTREL24(r_addend=0x8000) in a
function, both GNU ld and lld (after D71621 fix) may produce a wrong
result.

This patch fixes 4 to use R_PPC_PLTREL24, which matches GCC.
Both GNU ld and lld (after D71621) will be happy.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D71649
2019-12-20 11:32:02 -08:00
..
AArch64 [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant 2019-12-20 13:52:19 -05:00
AMDGPU [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr 2019-12-17 18:54:27 +00:00
ARC
ARM Revert "[ARM] Improve codegen of volatile load/store of i64" 2019-12-20 18:08:24 +00:00
AVR
BPF [BPF] put not-section-attribute externs into BTF ".extern" data section 2019-12-10 11:45:17 -08:00
Generic
Hexagon
Inputs
Lanai
Mips [Mips] Add support for min/max/umin/umax atomics 2019-12-12 11:32:37 +01:00
MIR [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands. 2019-12-16 18:25:04 -05:00
MSP430
NVPTX
PowerPC [PPC32] Emit R_PPC_PLTREL24 for calls to dso_local ifunc 2019-12-20 11:32:02 -08:00
RISCV [RISCV] Enable the machine outliner for RISC-V 2019-12-19 16:41:53 +00:00
SPARC
SystemZ [SystemZ] Add a mapping from "select register" to "load on condition" (2-addr). 2019-12-20 10:44:58 -08:00
Thumb Revert "ARM-Darwin: keep the frame register reserved even if not updated." 2019-12-06 10:59:26 -08:00
Thumb2 [ARM][MVE] Fixes for tail predication. 2019-12-20 09:34:18 +00:00
WebAssembly [WebAssembly] Add avgr_u intrinsics and require nuw in patterns 2019-12-18 15:31:38 -08:00
WinCFGuard
WinEH
X86 [X86] Fix a KNL miscompile caused by combineSetCC swapping LHS/RHS variables before a later use. 2019-12-20 11:24:45 -08:00
XCore