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f584ef9bf9
Corrected DS_GWS opcodes to use even aligned registers. Differential Revision: https://reviews.llvm.org/D103185
10 lines
388 B
ArmAsm
10 lines
388 B
ArmAsm
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx90a %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
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//==============================================================================
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// vgpr must be even aligned
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ds_gws_init a1 offset:65535 gds
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// CHECK: error: vgpr must be even aligned
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// CHECK-NEXT:{{^}}ds_gws_init a1 offset:65535 gds
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// CHECK-NEXT:{{^}} ^
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