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llvm-mirror/test/MC/ARM/directive-arch-armv6t2.s
Elvina Yakubova 6cd76408bf [llvm-readobj] Update tests because of changes in llvm-readobj behavior
This patch updates tests using llvm-readobj and llvm-readelf, because
soon reading from stdin will be achievable only via a '-' as described
here: https://bugs.llvm.org/show_bug.cgi?id=46400. Patch with changes to
llvm-readobj behavior is here: https://reviews.llvm.org/D83704

Differential Revision: https://reviews.llvm.org/D83912

Reviewed by: jhenderson, MaskRay, grimar
2020-07-20 10:39:04 +01:00

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963 B
ArmAsm

@ Test the .arch directive for armv6t2
@ This test case will check the default .ARM.attributes value for the
@ armv6t2 architecture.
@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
@ RUN: | FileCheck %s -check-prefix CHECK-ASM
@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
@ RUN: | llvm-readobj --arch-specific - | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6t2
@ CHECK-ASM: .arch armv6t2
@ CHECK-ATTR: FileAttributes {
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_name
@ CHECK-ATTR: Value: 6T2
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: CPU_arch
@ CHECK-ATTR: Description: ARM v6T2
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: ARM_ISA_use
@ CHECK-ATTR: Description: Permitted
@ CHECK-ATTR: }
@ CHECK-ATTR: Attribute {
@ CHECK-ATTR: TagName: THUMB_ISA_use
@ CHECK-ATTR: Description: Thumb-2
@ CHECK-ATTR: }
@ CHECK-ATTR: }