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053618b18b
TargetSchedModel now always delegates to MCSchedModel the computation of instruction latency and reciprocal throughput. No functional change intended. llvm-svn: 330099
98 lines
3.8 KiB
C++
98 lines
3.8 KiB
C++
//===- MCSchedule.cpp - Scheduling ------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the default scheduling model.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCSchedule.h"
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#include "llvm/MC/MCInstrDesc.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include <type_traits>
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using namespace llvm;
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static_assert(std::is_pod<MCSchedModel>::value,
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"We shouldn't have a static constructor here");
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const MCSchedModel MCSchedModel::Default = {DefaultIssueWidth,
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DefaultMicroOpBufferSize,
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DefaultLoopMicroOpBufferSize,
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DefaultLoadLatency,
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DefaultHighLatency,
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DefaultMispredictPenalty,
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false,
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true,
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0,
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nullptr,
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nullptr,
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0,
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0,
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nullptr,
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nullptr};
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int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI,
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const MCSchedClassDesc &SCDesc) {
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int Latency = 0;
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for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries;
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DefIdx != DefEnd; ++DefIdx) {
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// Lookup the definition's write latency in SubtargetInfo.
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const MCWriteLatencyEntry *WLEntry =
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STI.getWriteLatencyEntry(&SCDesc, DefIdx);
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// Early exit if we found an invalid latency.
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if (WLEntry->Cycles < 0)
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return WLEntry->Cycles;
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Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles));
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}
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return Latency;
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}
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int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI,
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unsigned SchedClass) const {
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const MCSchedClassDesc &SCDesc = *getSchedClassDesc(SchedClass);
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if (!SCDesc.isValid())
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return 0;
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if (!SCDesc.isVariant())
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return MCSchedModel::computeInstrLatency(STI, SCDesc);
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llvm_unreachable("unsupported variant scheduling class");
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}
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Optional<double>
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MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI,
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const MCSchedClassDesc &SCDesc) {
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Optional<double> Throughput;
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const MCSchedModel &SM = STI.getSchedModel();
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const MCWriteProcResEntry *I = STI.getWriteProcResBegin(&SCDesc);
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const MCWriteProcResEntry *E = STI.getWriteProcResEnd(&SCDesc);
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for (; I != E; ++I) {
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if (!I->Cycles)
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continue;
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unsigned NumUnits = SM.getProcResource(I->ProcResourceIdx)->NumUnits;
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double Temp = NumUnits * 1.0 / I->Cycles;
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Throughput = Throughput ? std::min(Throughput.getValue(), Temp) : Temp;
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}
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return Throughput ? 1 / Throughput.getValue() : Throughput;
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}
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Optional<double>
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MCSchedModel::getReciprocalThroughput(unsigned SchedClass,
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const InstrItineraryData &IID) {
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Optional<double> Throughput;
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const InstrStage *I = IID.beginStage(SchedClass);
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const InstrStage *E = IID.endStage(SchedClass);
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for (; I != E; ++I) {
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if (!I->getCycles())
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continue;
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double Temp = countPopulation(I->getUnits()) * 1.0 / I->getCycles();
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Throughput = Throughput ? std::min(Throughput.getValue(), Temp) : Temp;
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}
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return Throughput ? 1 / Throughput.getValue() : Throughput;
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}
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